Datasheet Texas Instruments SN65LVDS386DGG — Ficha de datos

FabricanteTexas Instruments
SerieSN65LVDS386
Numero de parteSN65LVDS386DGG
Datasheet Texas Instruments SN65LVDS386DGG

Receptor LVDS de 16 canales 64-TSSOP -40 a 85

Hojas de datos

High-Speed Differential Line Receivers. datasheet
PDF, 1.7 Mb, Revisión: I, Archivo publicado: jul 29, 2014
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin64
Package TypeDGG
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY25
CarrierTUBE
Device MarkingLVDS386
Width (mm)6.1
Length (mm)17
Thickness (mm)1.15
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataDescargar

Paramétricos

Device TypeReceiver
ESD HBM15 kV
FunctionReceiver
ICC(Max)70 mA
Input SignalLVDS
No. of Rx16
Operating Temperature Range-40 to 85 C
Output SignalLVTTL
Package GroupTSSOP
Package Size: mm2:W x L64TSSOP: 138 mm2: 8.1 x 17(TSSOP) PKG
ProtocolsLVDS
Signaling Rate250 Mbps

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: SN65LVDS386EVM
    16-channel LVDS Receiver Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Using Signaling Rate and Transfer Rate (Rev. A)
    PDF, 258 Kb, Revisión: A, Archivo publicado: feb 7, 2005
    This document defines data signaling rate and data transfer rate, and it demonstrates the differences between them. Taking the SN65LVDS386 and SN65LVDS387 16-channellow-voltage differential (LVDS) line drivers and receivers with random parallel data of various bandwidths as an example, this document discusses the components that make up the system timing budget and presents empirical data on cro

Linea modelo

Clasificación del fabricante

  • Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points