Datasheet Texas Instruments SNJ54LVTH574FK — Ficha de datos

FabricanteTexas Instruments
SerieSN54LVTH574
Numero de parteSNJ54LVTH574FK
Datasheet Texas Instruments SNJ54LVTH574FK

Chanclas de tipo D de 3,3 V V con borde octal activadas por borde con salidas de 3 estados 20-LCCC -55 a 125

Hojas de datos

SN54LVTH574, SN74LVTH574 datasheet
PDF, 1.4 Mb, Revisión: G, Archivo publicado: sept 15, 2003
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin20202020
Package TypeFKFKFKFK
Industry STD TermLCCCLCCCLCCCLCCC
JEDEC CodeS-CQCC-NS-CQCC-NS-CQCC-NS-CQCC-N
Package QTY1111
CarrierTUBETUBETUBETUBE
Device Marking574FK9583201Q2A5962-SNJ54LVTH
Width (mm)8.898.898.898.89
Length (mm)8.898.898.898.89
Thickness (mm)1.831.831.831.83
Pitch (mm)1.271.271.271.27
Max Height (mm)2.032.032.032.03
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

3-State OutputYes
Bits8
F @ Nom Voltage(Max)160 Mhz
ICC @ Nom Voltage(Max)5 mA
Input TypeTTL
Operating Temperature Range-55 to 125 C
Output Drive (IOL/IOH)(Max)64/-32 mA
Output TypeTTL
Package GroupLCCC
Package Size: mm2:W x L20LCCC: 79 mm2: 8.89 x 8.89(LCCC) PKG
RatingMilitary
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
tpd @ Nom Voltage(Max)4.5 ns

Plan ecológico

RoHSSee ti.com

Notas de aplicación

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Archivo publicado: dic 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Linea modelo

Clasificación del fabricante

  • Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers