Datasheet Texas Instruments SNJ54LVTH573J — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN54LVTH573 |
| Numero de parte | SNJ54LVTH573J |
3.3-V ABT Octal Cierres transparentes tipo D con salidas de 3 estados 20-CDIP -55 a 125
Hojas de datos
SN54LVTH573, SN74LVTH573 datasheet
PDF, 1.5 Mb, Revisión: H, Archivo publicado: sept 15, 2003
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 20 | 20 | 20 |
| Package Type | J | J | J |
| Industry STD Term | CDIP | CDIP | CDIP |
| JEDEC Code | R-GDIP-T | R-GDIP-T | R-GDIP-T |
| Package QTY | 1 | 1 | 1 |
| Carrier | TUBE | TUBE | TUBE |
| Device Marking | SNJ54LVTH573J | A | 5962-9583101QR |
| Width (mm) | 6.92 | 6.92 | 6.92 |
| Length (mm) | 24.2 | 24.2 | 24.2 |
| Thickness (mm) | 4.57 | 4.57 | 4.57 |
| Pitch (mm) | 2.54 | 2.54 | 2.54 |
| Max Height (mm) | 5.08 | 5.08 | 5.08 |
| Mechanical Data | Descargar | Descargar | Descargar |
Paramétricos
| 3-State Output | Yes |
| Bits | 8 |
| F @ Nom Voltage(Max) | 160 Mhz |
| ICC @ Nom Voltage(Max) | 5 mA |
| Input Type | TTL |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 48/-24 mA |
| Output Type | TTL |
| Package Group | CDIP |
| Package Size: mm2:W x L | See datasheet (CDIP) PKG |
| Rating | Military |
| Technology Family | LVT |
| VCC(Max) | 3.6 V |
| VCC(Min) | 2.7 V |
| tpd @ Nom Voltage(Max) | 4.5 ns |
Plan ecológico
| RoHS | See ti.com |
Notas de aplicación
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Linea modelo
Serie: SN54LVTH573 (6)
- 5962-9583101Q2A 5962-9583101QRA 5962-9583101QSA SNJ54LVTH573FK SNJ54LVTH573J SNJ54LVTH573W
Clasificación del fabricante
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers