Datasheet Texas Instruments SNJ54LVTH18502AHV — Ficha de datos

Dispositivos de prueba de escaneo ABT de 3.3 V con transceptores de bus universal de 18 bits 68-CFP -55 a 125

Hojas de datos

PDF, 890 Kb, Revisión: C, Archivo publicado: jun 3, 2004

Extracto del documento

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

Bits	18
ICC @ Nom Voltage(Max)	24 mA
Input Type	TTL
Operating Temperature Range	-55 to 125 C
Output Drive (IOL/IOH)(Max)	64/-32 mA
Output Type	TTL
Package Group	CFP
Package Size: mm2:W x L	See datasheet (CFP) PKG
Rating	Military
Technology Family	LVT
VCC(Max)	3.6 V
VCC(Min)	2.7 V
tpd @ Nom Voltage(Max)	4.9 ns

RoHS	See ti.com

Descargar
LVT Family Characteristics (Rev. A)
PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
Descargar
LVT-to-LVTH Conversion
PDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Serie: SN54LVTH18502A (2)

Semiconductors > Space & High Reliability > Logic Products > Specialty Logic Products > Boundary Scan (JTAG)