Datasheet Texas Instruments SN54ALS259 — Ficha de datos
Fabricante | Texas Instruments |
Serie | SN54ALS259 |
Cierres direccionables de 8 bits
Hojas de datos
8-Bit Addressable Latches datasheet
PDF, 523 Kb, Revisión: A, Archivo publicado: dic 1, 1994
Extracto del documento
Precios
Estado
5962-8874101EA | SN54ALS259J | SNJ54ALS259J | |
---|---|---|---|
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No | No | No |
Embalaje
5962-8874101EA | SN54ALS259J | SNJ54ALS259J | |
---|---|---|---|
N | 1 | 2 | 3 |
Pin | 16 | 16 | 16 |
Package Type | J | J | J |
Industry STD Term | CDIP | CDIP | CDIP |
JEDEC Code | R-GDIP-T | R-GDIP-T | R-GDIP-T |
Package QTY | 1 | 1 | 1 |
Carrier | TUBE | TUBE | TUBE |
Width (mm) | 6.92 | 6.92 | 6.92 |
Length (mm) | 19.56 | 19.56 | 19.56 |
Thickness (mm) | 4.57 | 4.57 | 4.57 |
Pitch (mm) | 2.54 | 2.54 | 2.54 |
Max Height (mm) | 5.08 | 5.08 | 5.08 |
Mechanical Data | Descargar | Descargar | Descargar |
Device Marking | SN54ALS259J | 5962-8874101EA |
Paramétricos
Parameters / Models | 5962-8874101EA | SN54ALS259J | SNJ54ALS259J |
---|---|---|---|
3-State Output | No | No | No |
Bits | 8 | 8 | 8 |
F @ Nom Voltage(Max), Mhz | 75 | 75 | 75 |
ICC @ Nom Voltage(Max), mA | 22 | 22 | 22 |
Input Type | TTL | TTL | TTL |
Operating Temperature Range, C | -55 to 125 | -55 to 125 | -55 to 125 |
Output Drive (IOL/IOH)(Max), mA | 8/-0.4 | 8/-0.4 | 8/-0.4 |
Output Type | TTL | TTL | TTL |
Package Group | CDIP | CDIP | CDIP |
Package Size: mm2:W x L, PKG | See datasheet (CDIP) | See datasheet (CDIP) | See datasheet (CDIP) |
Rating | Military | Military | Military |
Technology Family | ALS | ALS | ALS |
VCC(Max), V | 5.5 | 5.5 | 5.5 |
VCC(Min), V | 4.5 | 4.5 | 4.5 |
tpd @ Nom Voltage(Max), ns | 19 | 19 | 19 |
Plan ecológico
5962-8874101EA | SN54ALS259J | SNJ54ALS259J | |
---|---|---|---|
RoHS | See ti.com | See ti.com | See ti.com |
Notas de aplicación
- Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, Archivo publicado: agosto 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t - Input and Output Characteristics of Digital Integrated CircuitsPDF, 1.7 Mb, Archivo publicado: oct 1, 1996
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
- TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Kb, Archivo publicado: agosto 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con - Live InsertionPDF, 150 Kb, Archivo publicado: oct 1, 1996
Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha - Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)PDF, 105 Kb, Revisión: A, Archivo publicado: agosto 1, 1997
The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi - Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
- Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, Archivo publicado: jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Designing With Logic (Rev. C)PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Introduction to LogicPDF, 93 Kb, Archivo publicado: abr 30, 2015
Linea modelo
Serie: SN54ALS259 (3)
Clasificación del fabricante
- Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers