Datasheet Texas Instruments SN54ALS259 — Ficha de datos

FabricanteTexas Instruments
SerieSN54ALS259
Datasheet Texas Instruments SN54ALS259

Cierres direccionables de 8 bits

Hojas de datos

8-Bit Addressable Latches datasheet
PDF, 523 Kb, Revisión: A, Archivo publicado: dic 1, 1994
Extracto del documento

Precios

Estado

5962-8874101EASN54ALS259JSNJ54ALS259J
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNo

Embalaje

5962-8874101EASN54ALS259JSNJ54ALS259J
N123
Pin161616
Package TypeJJJ
Industry STD TermCDIPCDIPCDIP
JEDEC CodeR-GDIP-TR-GDIP-TR-GDIP-T
Package QTY111
CarrierTUBETUBETUBE
Width (mm)6.926.926.92
Length (mm)19.5619.5619.56
Thickness (mm)4.574.574.57
Pitch (mm)2.542.542.54
Max Height (mm)5.085.085.08
Mechanical DataDescargarDescargarDescargar
Device MarkingSN54ALS259J5962-8874101EA

Paramétricos

Parameters / Models5962-8874101EA
5962-8874101EA
SN54ALS259J
SN54ALS259J
SNJ54ALS259J
SNJ54ALS259J
3-State OutputNoNoNo
Bits888
F @ Nom Voltage(Max), Mhz757575
ICC @ Nom Voltage(Max), mA222222
Input TypeTTLTTLTTL
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA8/-0.48/-0.48/-0.4
Output TypeTTLTTLTTL
Package GroupCDIPCDIPCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)See datasheet (CDIP)See datasheet (CDIP)
RatingMilitaryMilitaryMilitary
Technology FamilyALSALSALS
VCC(Max), V5.55.55.5
VCC(Min), V4.54.54.5
tpd @ Nom Voltage(Max), ns191919

Plan ecológico

5962-8874101EASN54ALS259JSNJ54ALS259J
RoHSSee ti.comSee ti.comSee ti.com

Notas de aplicación

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    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
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    PDF, 337 Kb, Archivo publicado: jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
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    PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
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    PDF, 93 Kb, Archivo publicado: abr 30, 2015

Linea modelo

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers