Datasheet Texas Instruments DS92LV1224TMSA — Ficha de datos

30-66 MHz Deserializador de 10 bits 28-SSOP -40 a 85

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PDF, 1.2 Mb, Revisión: A, Archivo publicado: abr 16, 2013

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Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

ESD	2 kV
Function	Deserializer
Input Compatibility	LVDS,BLVDS
Operating Temperature Range	-40 to 85 C
Output Compatibility	LVTTL
Package Group	SSOP
Package Size: mm2:W x L	28SSOP: 80 mm2: 7.8 x 10.2(SSOP) PKG
Protocols	Channel-Link I
Rating	Catalog
Supply Voltage(s)	3.3 V

RoHS	See ti.com

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How to Validate BLVDS SER/DES Signal Integrity Using an Eye Mask (Rev. A)
PDF, 2.0 Mb, Revisión: A, Archivo publicado: abr 26, 2013
The following application report contains information that will help you validate signal quality on a BLVDS SER/DES link. How to capture an eye pattern, how to generate an eye mask, and how to validate signal quality are all explained in detail in this document.
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DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)
PDF, 170 Kb, Revisión: E, Archivo publicado: abr 29, 2013
Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of todayвЂ™s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer

Serie: DS92LV1224 (3)