Datasheet Texas Instruments DS90UR906QSQX/NOPB — Ficha de datos

FabricanteTexas Instruments
SerieDS90UR906Q-Q1
Numero de parteDS90UR906QSQX/NOPB
Datasheet Texas Instruments DS90UR906QSQX/NOPB

Deserializador Color FPD-Link II de 5-65MHz de 24 bits 60-WQFN -40 a 105

Hojas de datos

DS90UR90xQ-Q1 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer datasheet
PDF, 1.6 Mb, Revisión: H, Archivo publicado: jul 31, 2015
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin60
Package TypeNKB
Industry STD TermWQFN
JEDEC CodeS-PQSO-N
Package QTY2000
CarrierLARGE T&R
Device MarkingUR906QSQ
Width (mm)9
Length (mm)9
Thickness (mm).8
Pitch (mm).5
Max Height (mm).8
Mechanical DataDescargar

Paramétricos

Color Depth24 bpp
DiagnosticsBIST,I2C Bus
EMI ReductionSSCG,RDS,Progressive Turn On (PTO)
FunctionDeserializer
Input CompatibilityFPD-Link II LVDS
Operating Temperature Range-40 to 105 C
Output CompatibilityLVCMOS
Package GroupWQFN
Package Size: mm2:W x L60WQFN: 81 mm2: 9 x 9(WQFN) PKG
Pixel Clock Min5 MHz
Pixel Clock(Max)65 MHz
RatingAutomotive
Signal ConditioningEqualizer
Special Features1.8V or 3.3V VDDIO,I2C Config
Total Throughput1560 Mbps

Plan ecológico

RoHSObediente

Notas de aplicación

  • AN-1807 FPD-Link II Display SerDes Overview (Rev. B)
    PDF, 45 Kb, Revisión: B, Archivo publicado: abr 26, 2013
    TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features, and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock, while 24-bit RGB was s
  • LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
    PDF, 101 Kb, Revisión: A, Archivo publicado: abr 29, 2013
    This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
  • Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)
    PDF, 118 Kb, Revisión: A, Archivo publicado: abr 26, 2013
    TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.

Linea modelo

Clasificación del fabricante

  • Semiconductors > Interface > FPD-Link SerDes > Display SerDes