Datasheet Texas Instruments DS90CR218AMTDX/NOPB — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | DS90CR218A |
| Numero de parte | DS90CR218AMTDX/NOPB |
+ 3.3V Rising Edge Data Strobe LVDS Receptor de enlace de canal de 21 bits - 85 MHz 48-TSSOP -10 a 70
Hojas de datos
DS90CR218A 3.3VRising Edge Data Strobe LVDS 21Bit Chan Link 12MHz to 85MHz datasheet
PDF, 903 Kb, Revisión: D, Archivo publicado: abr 22, 2013
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 48 | 48 |
| Package Type | DGG | DGG |
| Industry STD Term | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 1000 | 1000 |
| Carrier | LARGE T&R | LARGE T&R |
| Device Marking | DS90CR218AMTD | >B |
| Width (mm) | 6.1 | 6.1 |
| Length (mm) | 12.5 | 12.5 |
| Thickness (mm) | 1.15 | 1.15 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Descargar | Descargar |
Paramétricos
| Clock Max | 85 MHz |
| Clock Min | 12 MHz |
| Compression Ratio | 21 to 3 |
| Data Throughput | 1785 Mbps |
| ESD | 7 kV |
| Function | Deserializer |
| Input Compatibility | LVDS |
| Operating Temperature Range | -10 to 70 C |
| Output Compatibility | LVCMOS |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG |
| Parallel Bus Width | 21 bits |
| Protocols | Channel-Link I |
| Rating | Catalog |
| Supply Voltage(s) | 3.3 V |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- CHANNEL LINK Moving and Shaping Information In Point-To-Point ApplicationsPDF, 269 Kb, Archivo publicado: oct 5, 1998
- AN-1538 Interfacing Nationals DS90CR218A and LM98714 (Rev. C)PDF, 84 Kb, Revisión: C, Archivo publicado: abr 26, 2013
This application report examines the issues that system designers may face when interfacing the Texas Instruments DS90CR218A and LM98714. It also offers guidance and solutions on solving these issues that will deliver for a reliable and cost effective LVDS data link. - Multi-Drop Channel-Link OperationPDF, 212 Kb, Archivo publicado: oct 4, 2004
- Receiver Skew Margin for Channel Link I and FPD Link I DevicesPDF, 418 Kb, Archivo publicado: enero 13, 2016
- AN-1108 Channel-Link PCB and Interconnect Design-In GuidelinesPDF, 245 Kb, Archivo publicado: mayo 15, 2004
Application Note 1108 Channel-Link PCB and Interconnect Design-In Guidelines
Linea modelo
Serie: DS90CR218A (2)
- DS90CR218AMTD/NOPB DS90CR218AMTDX/NOPB
Clasificación del fabricante
- Semiconductors > Interface > LVDS/M-LVDS/PECL > SerDes/Channel-Link