Datasheet Texas Instruments DS25BR120TSD/NOPB — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | DS25BR120 |
| Numero de parte | DS25BR120TSD/NOPB |
3.125 Gbps LVDS Buffer con Pre-énfasis de Transmisión 8-WSON -40 a 85
Hojas de datos
DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis datasheet
PDF, 841 Kb, Revisión: E, Archivo publicado: abr 14, 2013
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | Sí |
Embalaje
| Pin | 8 |
| Package Type | NGQ |
| Industry STD Term | WSON |
| JEDEC Code | S-PDSO-N |
| Package QTY | 1000 |
| Carrier | SMALL T&R |
| Device Marking | 2R120 |
| Width (mm) | 3 |
| Length (mm) | 3 |
| Thickness (mm) | .8 |
| Pitch (mm) | .5 |
| Max Height (mm) | .8 |
| Mechanical Data | Descargar |
Paramétricos
| Device Type | Buffer |
| ESD HBM | 7 kV |
| Function | Buffer |
| ICC(Max) | 43 mA |
| Operating Temperature Range | -40 to 85 C |
| Package Group | WSON |
| Package Size: mm2:W x L | See datasheet (WSON) PKG |
| Protocols | LVDS |
Plan ecológico
| RoHS | Obediente |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: DS25BR100EVK
3.125 Gbps LVDS Single Channel Buffers with Transmit Pre-emphasis and Receive Equalization family
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)PDF, 101 Kb, Revisión: A, Archivo publicado: abr 29, 2013
This application note introduces Texas Instrument’s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions. - AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A)PDF, 275 Kb, Revisión: A, Archivo publicado: abr 26, 2013
Jitter is a phenomenon troubling many designers of high-speed interfaces. It reduces available timingmargin, limits transmission distance between a transmitter and a receiver, and increases system cost bydemanding better performing and more expensive interconnects. LVDS interfaces are not spared fromthese ill effects as they now operate at bit rates exceeding the 3 Gbps mark. Texas Instrumen
Linea modelo
Serie: DS25BR120 (1)
- DS25BR120TSD/NOPB
Clasificación del fabricante
- Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points