Datasheet Texas Instruments DP83867ISRGZT — Ficha de datos
Fabricante | Texas Instruments |
Serie | DP83867IS |
Numero de parte | DP83867ISRGZT |
Gigabit Ethernet PHY personalizado para entornos industriales difíciles con SGMII 48-VQFN -40 a 85
Hojas de datos
DP83867E/IS/CS Robust, High Immunity, Small Form Factor 10/100/1000 Ethernet Physical Layer Transceiver datasheet
PDF, 1.3 Mb, Revisión: B, Archivo publicado: marzo 7, 2017
Extracto del documento
Precios
Estado
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | Sí |
Embalaje
Pin | 48 |
Package Type | RGZ |
Industry STD Term | VQFN |
JEDEC Code | S-PQFP-N |
Package QTY | 250 |
Carrier | SMALL T&R |
Device Marking | DP83867IS |
Width (mm) | 7 |
Length (mm) | 7 |
Thickness (mm) | .9 |
Pitch (mm) | .5 |
Max Height (mm) | 1 |
Mechanical Data | Descargar |
Paramétricos
Cable Length | 130 m |
Datarate | 10/100/1000 Mbps |
Function | PHY |
Interface | RGMII,SGMII |
JTAG1149.1 | Yes |
Operating Temperature Range | -40 to 85 C |
Package Group | VQFN |
Package Size: mm2:W x L | 48VQFN: 49 mm2: 7 x 7(VQFN) PKG |
Port Count | Single |
Rating | Catalog |
Special Features | Cable Diagnostics,IEEE 1588 SOF |
Supply Voltage | 1,2.5 Volt |
Plan ecológico
RoHS | Obediente |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: DP83867ERGZ-R-EVM
DP83867ERGZ RGMII 1000M/100M/10M Ethernet PHY Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños) - Evaluation Modules & Boards: DP83867ERGZ-S-EVM
DP83867ERGZ SGMII 1000M/100M/10M Ethernet PHY Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- Importance of Latency in Factory AutomationPDF, 196 Kb, Archivo publicado: oct 25, 2015
Latency is a critical parameter in Ethernet networks developed for Factory Automation applications. Latency is not a defined value for Ethernet as specified by the IEEE 802.3 standard. Nor is Ethernet inherently synchronous or repeatable. This disconnect between the inherent characteristics of Ethernet and the needs of Factory Automation applications must be bridged though care - RGMII Interface Timing BudgetsPDF, 185 Kb, Archivo publicado: oct 28, 2015
RGMII Interface Timing Budgets is intended to serve as a guideline for developing a timing budget when using the RGMII v1.3 and v2.0 standard with a Gigabit PHY transceiver like the DP83867. - DP83867 Troubleshooting Guide (Rev. A)PDF, 700 Kb, Revisión: A, Archivo publicado: abr 6, 2016
A 10/100/1000 Ethernet Physical Layer device has multiple connections and many possible configurationoptions. While the DP83867 is designed with a priority on ease of use, there are many factors to considerduring initial board bring up. This application note provides guidance on the key criteria to verify in order toexpedite initial validation of DP83867 applications. - DP83867E/IS/CS/IR/CR RGZ Power Consumption DataPDF, 92 Kb, Archivo publicado: oct 7, 2015
Power consumption on an Ethernet PHY is affected by different operating conditions. System design around Ethernet products requires accurate power consumption numbers for component selection, thermal management and power distribution planning. This application report details power consumption of DP83867 in different conditions. - How to Configure DP83867 Start of FramePDF, 78 Kb, Archivo publicado: oct 27, 2015
The DP83867 can detect a Start of Frame Delimiter (SFD) for transmit and receive packets and output a pulse via a GPIO that can be used to assess the latency of the link between the DP83867 and a timestamp capable partner. For real-time systems and systems implementing the IEEE 1588 Precision Time Protocol (PTP) to timestamp packets for synchronizing devices across the network, - How to Configure DP838XX for Ethernet Compliance and Loopback Testing (Rev. A)PDF, 820 Kb, Revisión: A, Archivo publicado: enero 31, 2017
This application report covers how to setup and configure the DP838xx PHY (using the customer EVM) forEthernet Physical Layer Compliance (IEEE 802.3) testing as the device under test (DUT). This applicationnote primarily uses DP83867 as an example, but any DP838xx can use these procedures for compliancetesting.Refer to DP83822 IEEE 802.3u Compliance and Debug (SNLA266) for a DP83822 specif
Linea modelo
Serie: DP83867IS (2)
- DP83867ISRGZR DP83867ISRGZT
Clasificación del fabricante
- Semiconductors > Interface > Ethernet > Ethernet PHY