Datasheet Texas Instruments DAC5688 — Ficha de datos

FabricanteTexas Instruments
SerieDAC5688
Datasheet Texas Instruments DAC5688

Convertidor digital a analógico (DAC) de doble canal, 16 bits, 800-MSPS, 1x-8x interpolado

Hojas de datos

16-Bit, 800 MSPS 2x–8x Interpolating Dual-Channel Digital-to-Analog Converter (D datasheet
PDF, 1.6 Mb, Revisión: C, Archivo publicado: agosto 19, 2010
Extracto del documento

Precios

Estado

DAC5688IRGCRDAC5688IRGCRG4DAC5688IRGCT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

DAC5688IRGCRDAC5688IRGCRG4DAC5688IRGCT
N123
Pin646464
Package TypeRGCRGCRGC
Industry STD TermVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY20002000250
CarrierLARGE T&RLARGE T&RSMALL T&R
Device MarkingDAC5688IDAC5688IDAC5688I
Width (mm)999
Length (mm)999
Thickness (mm).88.88.88
Pitch (mm).5.5.5
Max Height (mm)111
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / ModelsDAC5688IRGCR
DAC5688IRGCR
DAC5688IRGCRG4
DAC5688IRGCRG4
DAC5688IRGCT
DAC5688IRGCT
ArchitectureCurrent SinkCurrent SinkCurrent Sink
DAC Channels222
InterfaceParallel CMOSParallel CMOSParallel CMOS
Interpolation1x,2x,4x,8x1x,2x,4x,8x1x,2x,4x,8x
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Package GroupVQFNVQFNVQFN
Package Size: mm2:W x L, PKG64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)64VQFN: 81 mm2: 9 x 9(VQFN)
Power Consumption(Typ), mW175017501750
RatingCatalogCatalogCatalog
Resolution, Bits161616
SFDR, dB808080
Sample / Update Rate, MSPS800800800

Plan ecológico

DAC5688IRGCRDAC5688IRGCRG4DAC5688IRGCT
RoHSObedienteObedienteObediente

Notas de aplicación

  • Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs
    PDF, 319 Kb, Archivo publicado: jul 14, 2009
  • Passive Terminations for Current Output DACs
    PDF, 244 Kb, Archivo publicado: nov 10, 2008
    The correct implementation of the high-speed DAC output termination is critical to achieving the best possible performance. The typical application involves choosing the correct network to create the necessary dc bias levels and correct effective impedance load to keep the output voltage within the compliance levels. This ensures that the maximum output signal amplitude and optimum ac performance
  • Q3 2009 Issue Analog Applications Journal
    PDF, 2.1 Mb, Archivo publicado: jul 14, 2009
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)