Datasheet Texas Instruments DAC5675-EP — Ficha de datos

FabricanteTexas Instruments
SerieDAC5675-EP
Datasheet Texas Instruments DAC5675-EP

Producto mejorado Convertidor digital a analógico de 14 bits a 400 Msps

Hojas de datos

DAC5675-EP datasheet
PDF, 1.1 Mb, Revisión: A, Archivo publicado: oct 24, 2006
Extracto del documento

Precios

Estado

DAC5675MPHPEPDAC5675MPHPREPV62/05619-01XEV62/05619-02XE
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNo

Embalaje

DAC5675MPHPEPDAC5675MPHPREPV62/05619-01XEV62/05619-02XE
N1234
Pin48484848
Package TypePHPPHPPHPPHP
Industry STD TermHTQFPHTQFPHTQFPHTQFP
JEDEC CodeS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-G
Package QTY25010001000250
CarrierJEDEC TRAY (10+1)LARGE T&RLARGE T&RJEDEC TRAY (10+1)
Device MarkingDC5675MEPDC5675MEPDC5675MEPDC5675MEP
Width (mm)7777
Length (mm)7777
Thickness (mm)1111
Pitch (mm).5.5.5.5
Max Height (mm)1.21.21.21.2
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsDAC5675MPHPEP
DAC5675MPHPEP
DAC5675MPHPREP
DAC5675MPHPREP
V62/05619-01XE
V62/05619-01XE
V62/05619-02XE
V62/05619-02XE
ArchitectureCurrent SinkCurrent SinkCurrent SinkCurrent Sink
DAC Channels1111
DNL(Max), +/-LSB2222
Gain Error(Max), %FSR10101010
INL(Max), +/-LSB4444
InterfaceParallel LVDSParallel LVDSParallel LVDSParallel LVDS
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125
Output Range Max., mA20202020
Output Range Min., mA2222
Output TypeCurrentCurrentCurrentCurrent
Package GroupHTQFPHTQFPHTQFPHTQFP
Package Size: mm2:W x L, PKG48HTQFP: 81 mm2: 9 x 9(HTQFP)48HTQFP: 81 mm2: 9 x 9(HTQFP)48HTQFP: 81 mm2: 9 x 9(HTQFP)48HTQFP: 81 mm2: 9 x 9(HTQFP)
Power Consumption(Typ), mW820820820820
RatingHiRel Enhanced ProductHiRel Enhanced ProductHiRel Enhanced ProductHiRel Enhanced Product
Reference: TypeIntIntIntInt
Resolution, Bits14141414
SFDR, dB77777777
Sample / Update Rate, MSPS400400400400
Settling Time, µs0.0120.0120.0120.012

Plan ecológico

DAC5675MPHPEPDAC5675MPHPREPV62/05619-01XEV62/05619-02XE
RoHSObedienteObedienteObedienteObediente

Notas de aplicación

  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig

Linea modelo

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Data Converter> Digital to Analog Converters