Datasheet Texas Instruments DAC5675 — Ficha de datos
Fabricante | Texas Instruments |
Serie | DAC5675 |
Convertidor digital a analógico (DAC) de 14 bits y 400 MSPS
Hojas de datos
DAC5675: 14-Bit, 400-MSPS Digital-To-Analog Converter datasheet
PDF, 576 Kb, Revisión: C, Archivo publicado: agosto 27, 2004
Extracto del documento
Precios
Estado
DAC5675IPHP | DAC5675IPHPR | DAC5675IPHPRG4 | |
---|---|---|---|
Estado del ciclo de vida | NRND (No recomendado para nuevos diseños) | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
Disponibilidad de muestra del fabricante | No | No | No |
Embalaje
DAC5675IPHP | DAC5675IPHPR | DAC5675IPHPRG4 | |
---|---|---|---|
N | 1 | 2 | 3 |
Pin | 48 | 48 | 48 |
Package Type | PHP | PHP | PHP |
Industry STD Term | HTQFP | HTQFP | HTQFP |
JEDEC Code | S-PQFP-G | S-PQFP-G | S-PQFP-G |
Package QTY | 250 | ||
Carrier | JEDEC TRAY (10+1) | ||
Device Marking | DAC5675I | ||
Width (mm) | 7 | 7 | 7 |
Length (mm) | 7 | 7 | 7 |
Thickness (mm) | 1 | 1 | 1 |
Pitch (mm) | .5 | .5 | .5 |
Max Height (mm) | 1.2 | 1.2 | 1.2 |
Mechanical Data | Descargar | Descargar | Descargar |
Plan ecológico
DAC5675IPHP | DAC5675IPHPR | DAC5675IPHPRG4 | |
---|---|---|---|
RoHS | Obediente | Desobediente | Desobediente |
Pb gratis | No | No |
Notas de aplicación
- Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, Archivo publicado: jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Superposition: The Hidden DAC Linearity ErrorPDF, 106 Kb, Archivo publicado: oct 2, 2000
A digital-to analog converter (DAC) translates digital signals to analog signals. For example, a 12-bit DAC takes a 12-bit binary number, called an input code, and converts it into one of 4,096 analog output voltages or currents. When the contribution to the output voltage or current of each individual bit is independent of any other, it means that the device exhibits no superposition error or tha
Linea modelo
Serie: DAC5675 (3)
Clasificación del fabricante
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)