Datasheet Texas Instruments CY54FCT574T — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | CY54FCT574T |
Chanclas O-Type de tipo D activadas por borde con salidas de 3 estados
Hojas de datos
8-Bit Registers With 3-State Outputs datasheet
PDF, 681 Kb, Archivo publicado: oct 11, 2001
Extracto del documento
Precios
Estado
| 5962-9222203M2A | 5962-9222203MRA | 5962-9222205MRA | CY54FCT574ATLMB | |
|---|---|---|---|---|
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No | No | No | No |
Embalaje
| 5962-9222203M2A | 5962-9222203MRA | 5962-9222205MRA | CY54FCT574ATLMB | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 20 | 20 | 20 | 20 |
| Package Type | FK | J | J | FK |
| Industry STD Term | LCCC | CDIP | CDIP | LCCC |
| JEDEC Code | S-CQCC-N | R-GDIP-T | R-GDIP-T | S-CQCC-N |
| Package QTY | 1 | 1 | 1 | 1 |
| Carrier | TUBE | TUBE | TUBE | TUBE |
| Width (mm) | 8.89 | 6.92 | 6.92 | 8.89 |
| Length (mm) | 8.89 | 24.2 | 24.2 | 8.89 |
| Thickness (mm) | 1.83 | 4.57 | 4.57 | 1.83 |
| Pitch (mm) | 1.27 | 2.54 | 2.54 | 1.27 |
| Max Height (mm) | 2.03 | 5.08 | 5.08 | 2.03 |
| Mechanical Data | Descargar | Descargar | Descargar | Descargar |
| Device Marking | 574ATLMB |
Plan ecológico
| 5962-9222203M2A | 5962-9222203MRA | 5962-9222205MRA | CY54FCT574ATLMB | |
|---|---|---|---|---|
| RoHS | See ti.com | See ti.com | See ti.com | See ti.com |
Notas de aplicación
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
- Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
- Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, Archivo publicado: jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - Introduction to LogicPDF, 93 Kb, Archivo publicado: abr 30, 2015
Linea modelo
Serie: CY54FCT574T (4)
Clasificación del fabricante
- Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers