Datasheet Texas Instruments CDCVF25081 — Ficha de datos
Fabricante | Texas Instruments |
Serie | CDCVF25081 |
Controlador de reloj de bucle de bloqueo de fase 1: 8 3.3-V
Hojas de datos
3.3V Phased-Lock Loop Clock Driver datasheet
PDF, 632 Kb, Revisión: A, Archivo publicado: feb 6, 2003
Extracto del documento
Precios
Estado
CDCVF25081D | CDCVF25081DG4 | CDCVF25081DR | CDCVF25081DRG4 | CDCVF25081PW | CDCVF25081PWG4 | CDCVF25081PWR | CDCVF25081PWRG4 | |
---|---|---|---|---|---|---|---|---|
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | Sí | No | Sí | Sí | No | No | Sí | No |
Embalaje
CDCVF25081D | CDCVF25081DG4 | CDCVF25081DR | CDCVF25081DRG4 | CDCVF25081PW | CDCVF25081PWG4 | CDCVF25081PWR | CDCVF25081PWRG4 | |
---|---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
Pin | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
Package Type | D | D | D | D | PW | PW | PW | PW |
Industry STD Term | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 40 | 40 | 2500 | 2500 | 90 | 90 | 2000 | 2000 |
Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R |
Device Marking | CKV25081 | CKV25081 | CKV25081 | CKV25081 | CK081 | CK081 | CK081 | CK081 |
Width (mm) | 3.91 | 3.91 | 3.91 | 3.91 | 4.4 | 4.4 | 4.4 | 4.4 |
Length (mm) | 9.9 | 9.9 | 9.9 | 9.9 | 5 | 5 | 5 | 5 |
Thickness (mm) | 1.58 | 1.58 | 1.58 | 1.58 | 1 | 1 | 1 | 1 |
Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
Max Height (mm) | 1.75 | 1.75 | 1.75 | 1.75 | 1.2 | 1.2 | 1.2 | 1.2 |
Mechanical Data | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar |
Paramétricos
Parameters / Models | CDCVF25081D | CDCVF25081DG4 | CDCVF25081DR | CDCVF25081DRG4 | CDCVF25081PW | CDCVF25081PWG4 | CDCVF25081PWR | CDCVF25081PWRG4 |
---|---|---|---|---|---|---|---|---|
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter), ps | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 |
Number of Outputs | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
Operating Frequency Range(Max), MHz | 200 | 200 | 200 | 200 | 200 | 200 | 200 | 200 |
Operating Frequency Range(Min), MHz | 10 | 10 | 10 | 10 | 10 | 10 | 10 | 10 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Package Group | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
VCC, V | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 |
t(phase error), ps | 200 | 200 | 200 | 200 | 200 | 200 | 200 | 200 |
tsk(o), ps | 150 | 150 | 150 | 150 | 150 | 150 | 150 | 150 |
Plan ecológico
CDCVF25081D | CDCVF25081DG4 | CDCVF25081DR | CDCVF25081DRG4 | CDCVF25081PW | CDCVF25081PWG4 | CDCVF25081PWR | CDCVF25081PWRG4 | |
---|---|---|---|---|---|---|---|---|
RoHS | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente |
Notas de aplicación
- Using TI's CDCVF2310 and CDCVF25081 with TLK1501 Serial TransceiverPDF, 1.2 Mb, Archivo publicado: mayo 14, 2003
This test report discusses jitter transfer of the TI CDCVF2310 and CDCVF25081 clock drivers when driving the TI TLK1501 serial gigabit transceiver at 600 Mbit/sec. This application report summarizes the peak-to-peak and RMS jitter measurements taken during the testing of the clock drivers with the TLK1501. The CDCVF2310 is a high performance clock buffer that provides 10 low-skew copies of CLK at
Linea modelo
Serie: CDCVF25081 (8)
Clasificación del fabricante
- Semiconductors> Clock and Timing> Clock Buffers> Zero Delay Buffers