Datasheet Texas Instruments CDCM61001 — Ficha de datos

FabricanteTexas Instruments
SerieCDCM61001
Datasheet Texas Instruments CDCM61001

Generador de reloj con entrada de cristal de fluctuación ultra baja 1: 1

Hojas de datos

One Output, Integrated VCO, Low-Jitter Clock Generator.. datasheet
PDF, 948 Kb, Revisión: F, Archivo publicado: jun 2, 2011
Extracto del documento

Precios

Estado

CDCM61001RHBRCDCM61001RHBR/2801CDCM61001RHBT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

CDCM61001RHBRCDCM61001RHBR/2801CDCM61001RHBT
N123
Pin323232
Package TypeRHBRHBRHB
Industry STD TermVQFNVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY30003000250
CarrierLARGE T&RLARGE T&RSMALL T&R
Device Marking6100161001CDCM
Width (mm)555
Length (mm)555
Thickness (mm).9.9.9
Pitch (mm).5.5.5
Max Height (mm)111
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / ModelsCDCM61001RHBR
CDCM61001RHBR
CDCM61001RHBR/2801
CDCM61001RHBR/2801
CDCM61001RHBT
CDCM61001RHBT
Input LevelCrystal,LVCMOSCrystal,LVCMOSCrystal,LVCMOS
Number of Outputs111
Output Frequency(Max), MHz683.28683.28683.28
Output Frequency(Min), MHz43.7543.7543.75
Output LevelLVPECL,LVDS,LVCMOSLVPECL,LVDS,LVCMOSLVPECL,LVDS,LVCMOS
Package GroupVQFNVQFNVQFN
Package Size: mm2:W x L, PKG32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)32VQFN: 25 mm2: 5 x 5(VQFN)
ProgrammabilityPin configurationPin configurationPin configuration
Special FeaturesPin ProgrammingPin ProgrammingPin Programming
VCC Core, V3.33.33.3
VCC Out, V3.33.33.3

Plan ecológico

CDCM61001RHBRCDCM61001RHBR/2801CDCM61001RHBT
RoHSObedienteObedienteObediente

Notas de aplicación

  • Fibre Channel and SAN Clock Generation Using the CDCM6100x
    PDF, 322 Kb, Archivo publicado: feb 18, 2009
    This application report is a guide for using Texas Instruments CDCM6100x in a Fibre Channel application as a clock distributor and clock synthesizer along with measured jitter performance results.
  • Using LVCMOS Input to the CDCM6100x
    PDF, 66 Kb, Archivo publicado: mayo 23, 2010
    This application report is a general guide for using LVCMOS inputs to the CDCM6100x series of ultra-low jitter clock generators from Texas Instruments. This document explains the basic connectivity of LVCMOS inputs to the CDCM6100x and recommends several methods for using the device that ensure proper operation.
  • Ethernet Clock Generation Using the CDCM6100x
    PDF, 454 Kb, Archivo publicado: feb 18, 2009
    This application report is a guide for using Texas Instruments CDCM6100x in an Ethernet LAN and WAN application as a clock distributor and clock synthesizer along with measured jitter performance results.
  • TI Powers Altera's Arria II GX FPGA Development Kit
    PDF, 596 Kb, Archivo publicado: sept 29, 2009

Linea modelo

Clasificación del fabricante

  • Semiconductors> Clock and Timing> Clock Generators> General Purpose