Datasheet Texas Instruments CDCM61001RHBR — Ficha de datos
Fabricante | Texas Instruments |
Serie | CDCM61001 |
Numero de parte | CDCM61001RHBR |
Generador de reloj con entrada de cristal de fluctuación ultra baja 1: 1 32-VQFN
Hojas de datos
One Output, Integrated VCO, Low-Jitter Clock Generator.. datasheet
PDF, 948 Kb, Revisión: F, Archivo publicado: jun 2, 2011
Extracto del documento
Precios
Estado
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No |
Embalaje
Pin | 32 | 32 |
Package Type | RHB | RHB |
Industry STD Term | VQFN | VQFN |
JEDEC Code | S-PQFP-N | S-PQFP-N |
Package QTY | 3000 | 3000 |
Carrier | LARGE T&R | LARGE T&R |
Device Marking | 61001 | CDCM |
Width (mm) | 5 | 5 |
Length (mm) | 5 | 5 |
Thickness (mm) | .9 | .9 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1 | 1 |
Mechanical Data | Descargar | Descargar |
Paramétricos
Input Level | Crystal,LVCMOS |
Number of Outputs | 1 |
Output Frequency(Max) | 683.28 MHz |
Output Frequency(Min) | 43.75 MHz |
Output Level | LVPECL,LVDS,LVCMOS |
Package Group | VQFN |
Package Size: mm2:W x L | 32VQFN: 25 mm2: 5 x 5(VQFN) PKG |
Programmability | Pin configuration |
Special Features | Pin Programming |
VCC Core | 3.3 V |
VCC Out | 3.3 V |
Plan ecológico
RoHS | Obediente |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: CDCM6100XEVM
CDCM61004/CDCM61002/CDCM61001 Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- Fibre Channel and SAN Clock Generation Using the CDCM6100xPDF, 322 Kb, Archivo publicado: feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in a Fibre Channel application as a clock distributor and clock synthesizer along with measured jitter performance results. - Using LVCMOS Input to the CDCM6100xPDF, 66 Kb, Archivo publicado: mayo 23, 2010
This application report is a general guide for using LVCMOS inputs to the CDCM6100x series of ultra-low jitter clock generators from Texas Instruments. This document explains the basic connectivity of LVCMOS inputs to the CDCM6100x and recommends several methods for using the device that ensure proper operation. - Ethernet Clock Generation Using the CDCM6100xPDF, 454 Kb, Archivo publicado: feb 18, 2009
This application report is a guide for using Texas Instruments CDCM6100x in an Ethernet LAN and WAN application as a clock distributor and clock synthesizer along with measured jitter performance results. - TI Powers Altera's Arria II GX FPGA Development KitPDF, 596 Kb, Archivo publicado: sept 29, 2009
Linea modelo
Serie: CDCM61001 (3)
- CDCM61001RHBR CDCM61001RHBR/2801 CDCM61001RHBT
Clasificación del fabricante
- Semiconductors > Clock and Timing > Clock Generators > General Purpose