Datasheet Texas Instruments CDCLVC1112 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | CDCLVC1112 |
Jitter bajo, búfer de reloj en abanico LVCMOS 1:12
Hojas de datos
CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet
PDF, 1.6 Mb, Revisión: B, Archivo publicado: feb 24, 2017
Extracto del documento
Precios
Estado
| CDCLVC1112PW | CDCLVC1112PWR | |
|---|---|---|
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | Sí | No |
Embalaje
| CDCLVC1112PW | CDCLVC1112PWR | |
|---|---|---|
| N | 1 | 2 |
| Pin | 24 | 24 |
| Package Type | PW | PW |
| Industry STD Term | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 60 | 2000 |
| Carrier | TUBE | LARGE T&R |
| Device Marking | C9CC | C9CC |
| Width (mm) | 4.4 | 4.4 |
| Length (mm) | 7.8 | 7.8 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .65 | .65 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Descargar | Descargar |
Paramétricos
| Parameters / Models | CDCLVC1112PW | CDCLVC1112PWR |
|---|---|---|
| Additive RMS Jitter(Typ), fs | 70 | 70 |
| Input Frequency(Max), MHz | 250 | 250 |
| Input Level | LVCMOS | LVCMOS |
| Number of Outputs | 12 | 12 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 |
| Output Frequency(Max), MHz | 250 | 250 |
| Output Level | LVCMOS | LVCMOS |
| Package Group | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) |
| Rating | Catalog | Catalog |
| VCC Out, V | 2.5,3.3 | 2.5,3.3 |
Plan ecológico
| CDCLVC1112PW | CDCLVC1112PWR | |
|---|---|---|
| RoHS | Obediente | Obediente |
Notas de aplicación
- How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock BufferPDF, 518 Kb, Archivo publicado: nov 30, 2010
The CDCLVC11xx buffer family from Texas Instruments has a nominal voltage supply of 2.5 V and 3.3 V. With the simple employment of an external RC network, this family of devices can handle incoming signals whose voltage levels go up to 1.8 V. This application report explains how to implement this network and dimension its discrete components, without impacting the specifications of additive ji
Linea modelo
Serie: CDCLVC1112 (2)
Clasificación del fabricante
- Semiconductors> Clock and Timing> Clock Buffers> Single-Ended