Datasheet Texas Instruments CDC586 — Ficha de datos

FabricanteTexas Instruments
SerieCDC586
Datasheet Texas Instruments CDC586

Controlador de reloj PLL de 3.3V con opciones de frecuencia 1 / 2x, 1x y 2x

Hojas de datos

CDC586: 3.3-V PLL Clock Driver With 3-State Outputs datasheet
PDF, 305 Kb, Revisión: E, Archivo publicado: abr 19, 2004
Extracto del documento

Precios

Estado

CDC586PAHCDC586PAHG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante

Embalaje

CDC586PAHCDC586PAHG4
N12
Pin5252
Package TypePAHPAH
Industry STD TermTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY160160
CarrierJEDEC TRAY (10+1)JEDEC TRAY (10+1)
Device MarkingCDC586CDC586
Width (mm)1010
Length (mm)1010
Thickness (mm)11
Pitch (mm).65.65
Max Height (mm)1.21.2
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsCDC586PAH
CDC586PAH
CDC586PAHG4
CDC586PAHG4
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter), ps200200
Number of Outputs1212
Operating Frequency Range(Max), MHz100100
Operating Frequency Range(Min), MHz2525
Package GroupTQFPTQFP
Package Size: mm2:W x L, PKG52TQFP: 144 mm2: 12 x 12(TQFP)52TQFP: 144 mm2: 12 x 12(TQFP)
RatingCatalogCatalog
VCC, V3.33.3
t(phase error), ps500500
tsk(o), ps500500

Plan ecológico

CDC586PAHCDC586PAHG4
RoHSObedienteObediente

Notas de aplicación

  • Phase-Lock Loop-Based (PLL) Clock Drivers: Benefits Versus Costs (Rev. A)
    PDF, 51 Kb, Revisión: A, Archivo publicado: marzo 1, 1997
    This document provides an overview of a PLL clock driver. The advantages and disadvantages of PLLs and the cost in designs are discussed. TI manufactures three low-voltage high-performance PLL clock drivers, the CDC2582, CDC2586, and the CDC2586.
  • Application and Design Considerations for CDC5xx Phase-Lock Loop Clock Drivers
    PDF, 101 Kb, Archivo publicado: abr 1, 1996
    Today?s high-speed system designs require stringent propagation and skew parameters to maintain desired system performance. TI developed the CDC5XX platform of PLL clock drivers to meet the need for high-performance clock system components. This document describes the features and functions of the CDC5XX and discusses design considerations and configurations for the CDC586, CDC582, and CDC2582 clo

Linea modelo

Serie: CDC586 (2)

Clasificación del fabricante

  • Semiconductors> Clock and Timing> Clock Buffers> Zero Delay Buffers