Datasheet Texas Instruments CDC536 — Ficha de datos

FabricanteTexas Instruments
SerieCDC536
Datasheet Texas Instruments CDC536

Controlador de reloj PLL de 3.3V con opciones de frecuencia 1 / 2x, 1x y 2x

Hojas de datos

CDC536: 3.3-V PLL Clock Driver With 3-State Outputs datasheet
PDF, 322 Kb, Revisión: G, Archivo publicado: jul 8, 2004
Extracto del documento

Precios

Estado

CDC536DBCDC536DBG4CDC536DBRCDC536DBRG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

CDC536DBCDC536DBG4CDC536DBRCDC536DBRG4
N1234
Pin28282828
Package TypeDBDBDBDB
Industry STD TermSSOPSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY505020002000
CarrierTUBETUBELARGE T&RLARGE T&R
Device MarkingCDC536CDC536CDC536CDC536
Width (mm)5.35.35.35.3
Length (mm)10.210.210.210.2
Thickness (mm)1.951.951.951.95
Pitch (mm).65.65.65.65
Max Height (mm)2222
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsCDC536DB
CDC536DB
CDC536DBG4
CDC536DBG4
CDC536DBR
CDC536DBR
CDC536DBRG4
CDC536DBRG4
Absolute Jitter (Peak-to-Peak Cycle or Period Jitter), ps200200200200
Number of Outputs6666
Operating Frequency Range(Max), MHz100100100100
Operating Frequency Range(Min), MHz25252525
Package GroupSSOPSSOPSSOPSSOP
Package Size: mm2:W x L, PKG28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)28SSOP: 80 mm2: 7.8 x 10.2(SSOP)
RatingCatalogCatalogCatalogCatalog
VCC, V3.33.33.33.3
t(phase error), ps500500500500
tsk(o), ps500500500500

Plan ecológico

CDC536DBCDC536DBG4CDC536DBRCDC536DBRG4
RoHSObedienteObedienteObedienteObediente

Notas de aplicación

  • Application and Design Considerations for CDC5xx Phase-Lock Loop Clock Drivers
    PDF, 101 Kb, Archivo publicado: abr 1, 1996
    Today?s high-speed system designs require stringent propagation and skew parameters to maintain desired system performance. TI developed the CDC5XX platform of PLL clock drivers to meet the need for high-performance clock system components. This document describes the features and functions of the CDC5XX and discusses design considerations and configurations for the CDC586, CDC582, and CDC2582 clo

Linea modelo

Clasificación del fabricante

  • Semiconductors> Clock and Timing> Clock Buffers> Zero Delay Buffers