Datasheet Texas Instruments CDC208 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | CDC208 |
Controlador de reloj de 5V doble 1 a 4
Hojas de datos
Dual 1-Line To 4-Line Clock Drivers With 3-State Outputs datasheet
PDF, 1.1 Mb, Revisión: F, Archivo publicado: oct 28, 1998
Extracto del documento
Precios
Estado
| CDC208DW | CDC208DWG4 | CDC208DWR | CDC208DWRG4 | CDC208NS | CDC208NSG4 | CDC208NSR | CDC208NSRG4 | |
|---|---|---|---|---|---|---|---|---|
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No | Sí | No | Sí | Sí | No | No | Sí |
Embalaje
| CDC208DW | CDC208DWG4 | CDC208DWR | CDC208DWRG4 | CDC208NS | CDC208NSG4 | CDC208NSR | CDC208NSRG4 | |
|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DW | DW | DW | DW | NS | NS | NS | NS |
| Industry STD Term | SOIC | SOIC | SOIC | SOIC | SOP | SOP | SOP | SOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 2000 | 2000 | 40 | 40 | 2000 | 2000 |
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | CDC208 | CDC208 | CDC208 | CDC208 | CDC208 | CDC208 | CDC208 | CDC208 |
| Width (mm) | 7.5 | 7.5 | 7.5 | 7.5 | 5.3 | 5.3 | 5.3 | 5.3 |
| Length (mm) | 12.8 | 12.8 | 12.8 | 12.8 | 12.6 | 12.6 | 12.6 | 12.6 |
| Thickness (mm) | 2.35 | 2.35 | 2.35 | 2.35 | 1.95 | 1.95 | 1.95 | 1.95 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 |
| Max Height (mm) | 2.65 | 2.65 | 2.65 | 2.65 | 2 | 2 | 2 | 2 |
| Mechanical Data | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar |
Paramétricos
| Parameters / Models | CDC208DW | CDC208DWG4 | CDC208DWR | CDC208DWRG4 | CDC208NS | CDC208NSG4 | CDC208NSR | CDC208NSRG4 |
|---|---|---|---|---|---|---|---|---|
| Input Frequency(Max), MHz | 60 | 60 | 60 | 60 | 60 | 60 | 60 | 60 |
| Input Level | TTL | TTL | TTL | TTL | TTL | TTL | TTL | TTL |
| Number of Outputs | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Frequency(Max), MHz | 60 | 60 | 60 | 60 | 60 | 60 | 60 | 60 |
| Output Level | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS | CMOS |
| Package Group | SOIC | SOIC | SOIC | SOIC | SO | SO | SO | SO |
| Package Size: mm2:W x L, PKG | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SO: 98 mm2: 7.8 x 12.6(SO) | 20SO: 98 mm2: 7.8 x 12.6(SO) | 20SO: 98 mm2: 7.8 x 12.6(SO) | 20SO: 98 mm2: 7.8 x 12.6(SO) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| VCC Out, V | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
Plan ecológico
| CDC208DW | CDC208DWG4 | CDC208DWR | CDC208DWRG4 | CDC208NS | CDC208NSG4 | CDC208NSR | CDC208NSRG4 | |
|---|---|---|---|---|---|---|---|---|
| RoHS | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente |
Notas de aplicación
- Minimizing Clock Driver Output Skew Using Ganged OutputsPDF, 53 Kb, Archivo publicado: enero 1, 1994
This document helps designers use existing clock-driver products to drive large loads while maintaining a minimum amount of skew between the device outputs. The emphasis of this document is using parallel or ganged outputs to drive loads. A performance evaluation of the CDC201 is provided.
Linea modelo
Serie: CDC208 (8)
Clasificación del fabricante
- Semiconductors> Clock and Timing> Clock Buffers> Single-Ended