Datasheet Texas Instruments CD74HC75 — Ficha de datos

FabricanteTexas Instruments
SerieCD74HC75
Datasheet Texas Instruments CD74HC75

Cierres transparentes biestables dobles de 2 bits lógicos CMOS de alta velocidad

Hojas de datos

CD54HC75, CD74HC75, CD54HCT75, CD74HCT75 datasheet
PDF, 694 Kb, Revisión: F, Archivo publicado: oct 13, 2003
Extracto del documento

Precios

Estado

CD74HC75ECD74HC75EE4CD74HC75MCD74HC75M96CD74HC75MG4CD74HC75MTCD74HC75PWCD74HC75PWG4CD74HC75PWRCD74HC75PWRG4CD74HC75PWT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNoNoNoNo

Embalaje

CD74HC75ECD74HC75EE4CD74HC75MCD74HC75M96CD74HC75MG4CD74HC75MTCD74HC75PWCD74HC75PWG4CD74HC75PWRCD74HC75PWRG4CD74HC75PWT
N1234567891011
Pin1616161616161616161616
Package TypeNNDDDDPWPWPWPWPW
Industry STD TermPDIPPDIPSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252540250040250909020002000250
CarrierTUBETUBETUBELARGE T&RTUBESMALL T&RTUBETUBELARGE T&RLARGE T&RSMALL T&R
Device MarkingCD74HC75ECD74HC75EHC75MHC75MHC75MHC75MHJ75HJ75HJ75HJ75HJ75
Width (mm)6.356.353.913.913.913.914.44.44.44.44.4
Length (mm)19.319.39.99.99.99.955555
Thickness (mm)3.93.91.581.581.581.5811111
Pitch (mm)2.542.541.271.271.271.27.65.65.65.65.65
Max Height (mm)5.085.081.751.751.751.751.21.21.21.21.2
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsCD74HC75E
CD74HC75E
CD74HC75EE4
CD74HC75EE4
CD74HC75M
CD74HC75M
CD74HC75M96
CD74HC75M96
CD74HC75MG4
CD74HC75MG4
CD74HC75MT
CD74HC75MT
CD74HC75PW
CD74HC75PW
CD74HC75PWG4
CD74HC75PWG4
CD74HC75PWR
CD74HC75PWR
CD74HC75PWRG4
CD74HC75PWRG4
CD74HC75PWT
CD74HC75PWT
3-State OutputNoNoNoNoNoNoNoNoNoNoNo
Bits44444444444
F @ Nom Voltage(Max), Mhz2828282828282828282828
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.040.040.040.040.040.04
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA5.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.25.2/-5.2
Package GroupPDIPPDIPSOICSOICSOICSOICTSSOPTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNoNo
Technology FamilyHCHCHCHCHCHCHCHCHCHCHC
VCC(Max), V66666666666
VCC(Min), V22222222222
Voltage(Nom), V66666666666
tpd @ Nom Voltage(Max), ns2424242424242424242424

Plan ecológico

CD74HC75ECD74HC75EE4CD74HC75MCD74HC75M96CD74HC75MG4CD74HC75MTCD74HC75PWCD74HC75PWG4CD74HC75PWRCD74HC75PWRG4CD74HC75PWT
RoHSObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObediente
Pb gratis

Notas de aplicación

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, Archivo publicado: mayo 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Flip-Flop/Latch/Register> Other Latch