Datasheet Texas Instruments CD74HC112 — Ficha de datos

FabricanteTexas Instruments
SerieCD74HC112
Datasheet Texas Instruments CD74HC112

Chanclas JK lógicas CMOS lógicas de alta velocidad con disparo por borde negativo doble con configuración y restablecimiento

Hojas de datos

CD54HC112, CD74HC112, CD54HCT112, CD74HCT112 datasheet
PDF, 749 Kb, Revisión: H, Archivo publicado: oct 13, 2003
Extracto del documento

Precios

Estado

CD74HC112ECD74HC112M96CD74HC112MTCD74HC112NSRCD74HC112PWCD74HC112PWRCD74HC112PWRE4CD74HC112PWRG4CD74HC112PWT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNoNoNo

Embalaje

CD74HC112ECD74HC112M96CD74HC112MTCD74HC112NSRCD74HC112PWCD74HC112PWRCD74HC112PWRE4CD74HC112PWRG4CD74HC112PWT
N123456789
Pin161616161616161616
Package TypeNDDNSPWPWPWPWPW
Industry STD TermPDIPSOICSOICSOPTSSOPTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252500250200090200020002000250
CarrierTUBELARGE T&RSMALL T&RLARGE T&RTUBELARGE T&RLARGE T&RLARGE T&RSMALL T&R
Device MarkingCD74HC112EHC112MHC112MHC112MHJ112HJ112HJ112HJ112HJ112
Width (mm)6.353.913.915.34.44.44.44.44.4
Length (mm)19.39.99.910.355555
Thickness (mm)3.91.581.581.9511111
Pitch (mm)2.541.271.271.27.65.65.65.65.65
Max Height (mm)5.081.751.7521.21.21.21.21.2
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsCD74HC112E
CD74HC112E
CD74HC112M96
CD74HC112M96
CD74HC112MT
CD74HC112MT
CD74HC112NSR
CD74HC112NSR
CD74HC112PW
CD74HC112PW
CD74HC112PWR
CD74HC112PWR
CD74HC112PWRE4
CD74HC112PWRE4
CD74HC112PWRG4
CD74HC112PWRG4
CD74HC112PWT
CD74HC112PWT
Bits222222222
F @ Nom Voltage(Max), Mhz707070707070707070
ICC @ Nom Voltage(Max), mA0.040.040.040.040.040.040.040.040.04
Output Drive (IOL/IOH)(Max), mA-6/6-6/6-6/6-6/6-6/6-6/6-6/6-6/6-6/6
Package GroupPDIPSOICSOICSOTSSOPTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKGSee datasheet (PDIP)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SO: 80 mm2: 7.8 x 10.2(SO)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNo
Technology FamilyHCHCHCHCHCHCHCHCHC
VCC(Max), V666666666
VCC(Min), V222222222
Voltage(Nom), V3.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,53.3,5
tpd @ Nom Voltage(Max), ns535353535353535353

Plan ecológico

CD74HC112ECD74HC112M96CD74HC112MTCD74HC112NSRCD74HC112PWCD74HC112PWRCD74HC112PWRE4CD74HC112PWRG4CD74HC112PWT
RoHSObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObediente
Pb gratis

Notas de aplicación

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  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, Archivo publicado: mayo 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop