Datasheet Texas Instruments CD74AC373 — Ficha de datos

FabricanteTexas Instruments
SerieCD74AC373
Datasheet Texas Instruments CD74AC373

Cierres transparentes octales con salidas de 3 estados

Hojas de datos

Octal Transparent Latch, 3-State datasheet
PDF, 1.3 Mb, Archivo publicado: dic 3, 1998
Extracto del documento

Precios

Estado

CD74AC373ECD74AC373MCD74AC373M96CD74AC373MG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNo

Embalaje

CD74AC373ECD74AC373MCD74AC373M96CD74AC373MG4
N1234
Pin20202020
Package TypeNDWDWDW
Industry STD TermPDIPSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2025200025
CarrierTUBETUBELARGE T&RTUBE
Device MarkingCD74AC373EAC373MAC373MAC373M
Width (mm)6.357.57.57.5
Length (mm)24.3312.812.812.8
Thickness (mm)4.572.352.352.35
Pitch (mm)2.541.271.271.27
Max Height (mm)5.082.652.652.65
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsCD74AC373E
CD74AC373E
CD74AC373M
CD74AC373M
CD74AC373M96
CD74AC373M96
CD74AC373MG4
CD74AC373MG4
3-State OutputYesYesYesYes
Bits8888
F @ Nom Voltage(Max), Mhz100100100100
ICC @ Nom Voltage(Max), mA0.080.080.080.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-24
Package GroupPDIPSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyACACACAC
VCC(Max), V5.55.55.55.5
VCC(Min), V1.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns96,10.8,7.796,10.8,7.796,10.8,7.796,10.8,7.7

Plan ecológico

CD74AC373ECD74AC373MCD74AC373M96CD74AC373MG4
RoHSObedienteObedienteObedienteObediente
Pb gratis

Notas de aplicación

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch