Datasheet Texas Instruments CD54HCT74F — Ficha de datos
Fabricante | Texas Instruments |
Serie | CD54HCT74 |
Numero de parte | CD54HCT74F |
Chanclas de alta velocidad CMOS Logic Dual Positive Edge Trigger D con ajuste y reinicio 14-CDIP -55 a 125
Hojas de datos
CD54HC74, CD74HC74, CD54HCT74, CD74HCT74 datasheet
PDF, 727 Kb, Revisión: D, Archivo publicado: agosto 21, 2003
Extracto del documento
Precios
Estado
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No |
Embalaje
Pin | 14 |
Package Type | J |
Industry STD Term | CDIP |
JEDEC Code | R-GDIP-T |
Package QTY | 1 |
Carrier | TUBE |
Device Marking | CD54HCT74F |
Width (mm) | 6.67 |
Length (mm) | 19.56 |
Thickness (mm) | 4.57 |
Pitch (mm) | 2.54 |
Max Height (mm) | 5.08 |
Mechanical Data | Descargar |
Paramétricos
3-State Output | No |
Bits | 2 |
F @ Nom Voltage(Max) | 25 Mhz |
ICC @ Nom Voltage(Max) | 0.04 mA |
Input Type | TTL |
Operating Temperature Range | -55 to 125 C |
Output Drive (IOL/IOH)(Max) | 4/-4 mA |
Output Type | CMOS |
Package Group | CDIP |
Package Size: mm2:W x L | See datasheet (CDIP) PKG |
Rating | Military |
Technology Family | HCT |
VCC(Max) | 5.5 V |
VCC(Min) | 4.5 V |
tpd @ Nom Voltage(Max) | 44 ns |
Plan ecológico
RoHS | See ti.com |
Notas de aplicación
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, Archivo publicado: abr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren - SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, Archivo publicado: mayo 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
Linea modelo
Serie: CD54HCT74 (3)
- 5962-8685301CA CD54HCT74F CD54HCT74F3A
Clasificación del fabricante
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers