Datasheet Texas Instruments CD54ACT74 — Ficha de datos

FabricanteTexas Instruments
SerieCD54ACT74
Datasheet Texas Instruments CD54ACT74

Chanclas duales de tipo D activadas por borde positivo con ajuste y reinicio

Hojas de datos

CD54ACT74, CD74ACT74 datasheet
PDF, 986 Kb, Archivo publicado: dic 5, 2002
Extracto del documento

Precios

Estado

CD54ACT74F3A
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

CD54ACT74F3A
N1
Pin14
Package TypeJ
Industry STD TermCDIP
JEDEC CodeR-GDIP-T
Package QTY1
CarrierTUBE
Device MarkingCD54ACT74F3A
Width (mm)6.67
Length (mm)19.56
Thickness (mm)4.57
Pitch (mm)2.54
Max Height (mm)5.08
Mechanical DataDescargar

Paramétricos

Parameters / ModelsCD54ACT74F3A
CD54ACT74F3A
3-State OutputNo
Bits2
F @ Nom Voltage(Max), Mhz90
ICC @ Nom Voltage(Max), mA0.04
Input TypeTTL
Operating Temperature Range, C-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-24
Output TypeCMOS
Package GroupCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)
RatingMilitary
Technology FamilyACT
VCC(Max), V5.5
VCC(Min), V4.5
tpd @ Nom Voltage(Max), ns8.6

Plan ecológico

CD54ACT74F3A
RoHSSee ti.com

Notas de aplicación

  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Linea modelo

Serie: CD54ACT74 (1)

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers