Datasheet Texas Instruments CD54AC109 — Ficha de datos
Fabricante | Texas Instruments |
Serie | CD54AC109 |
Chanclas JK disparadas con borde positivo doble con ajuste y restablecimiento
Hojas de datos
CD54AC109, CD74AC109 datasheet
PDF, 901 Kb, Archivo publicado: enero 24, 2003
Extracto del documento
Precios
Estado
CD54AC109F3A | |
---|---|
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No |
Embalaje
CD54AC109F3A | |
---|---|
N | 1 |
Pin | 16 |
Package Type | J |
Industry STD Term | CDIP |
JEDEC Code | R-GDIP-T |
Package QTY | 1 |
Carrier | TUBE |
Device Marking | CD54AC109F3A |
Width (mm) | 6.92 |
Length (mm) | 19.56 |
Thickness (mm) | 4.57 |
Pitch (mm) | 2.54 |
Max Height (mm) | 5.08 |
Mechanical Data | Descargar |
Paramétricos
Parameters / Models | CD54AC109F3A |
---|---|
Bits | 2 |
F @ Nom Voltage(Max), Mhz | 100 |
ICC @ Nom Voltage(Max), mA | 0.04 |
Input Type | LVTTL/CMOS |
Operating Temperature Range, C | -55 to 125 |
Output Drive (IOL/IOH)(Max), mA | -24/24 |
Output Type | CMOS |
Package Group | CDIP |
Package Size: mm2:W x L, PKG | See datasheet (CDIP) |
Rating | Military |
Technology Family | AC |
VCC(Max), V | 5.5 |
VCC(Min), V | 1.5 |
tpd @ Nom Voltage(Max), ns | 11.1 |
Plan ecológico
CD54AC109F3A | |
---|---|
RoHS | See ti.com |
Notas de aplicación
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
- Designing With Logic (Rev. C)PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, Archivo publicado: abr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Linea modelo
Serie: CD54AC109 (1)
Clasificación del fabricante
- Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers