Datasheet Texas Instruments ADS8507 — Ficha de datos

FabricanteTexas Instruments
SerieADS8507
Datasheet Texas Instruments ADS8507

Convertidor analógico a digital 40KSPS de 16 bits con referencia interna e interfaz paralela / serie

Hojas de datos

16-Bit 40-KSPS Low Power Sampling Analog-to-Digital Converter datasheet
PDF, 1.2 Mb, Archivo publicado: dic 19, 2006
Extracto del documento

Precios

Estado

ADS8507IBDWADS8507IBDWG4ADS8507IBDWRADS8507IDWADS8507IDWG4ADS8507IDWRADS8507IDWRG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNo

Embalaje

ADS8507IBDWADS8507IBDWG4ADS8507IBDWRADS8507IDWADS8507IDWG4ADS8507IDWRADS8507IDWRG4
N1234567
Pin28282828282828
Package TypeDWDWDWDWDWDWDW
Industry STD TermSOICSOICSOICSOICSOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY20201000202010001000
CarrierTUBETUBELARGE T&RTUBETUBELARGE T&RLARGE T&R
Device MarkingADS8507IBADS8507IADS8507IADS8507IADS8507IADS8507I
Width (mm)7.57.57.57.57.57.57.5
Length (mm)17.917.917.917.917.917.917.9
Thickness (mm)2.352.352.352.352.352.352.35
Pitch (mm)1.271.271.271.271.271.271.27
Max Height (mm)2.652.652.652.652.652.652.65
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsADS8507IBDW
ADS8507IBDW
ADS8507IBDWG4
ADS8507IBDWG4
ADS8507IBDWR
ADS8507IBDWR
ADS8507IDW
ADS8507IDW
ADS8507IDWG4
ADS8507IDWG4
ADS8507IDWR
ADS8507IDWR
ADS8507IDWRG4
ADS8507IDWRG4
# Input Channels1111111
Analog Voltage AVDD(Max), V5.255.255.255.255.255.255.25
Analog Voltage AVDD(Min), V4.754.754.754.754.754.754.75
ArchitectureSARSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.255.25
Digital Supply(Min), V4.754.754.754.754.754.754.75
INL(Max), +/-LSB1.51.51.51.51.51.51.5
Input Range(Max), V10101010101010
Input Range(Min), V-10-10-10-10-10-10-10
Input TypeSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-Ended
Integrated FeaturesDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,Oscillator
InterfaceParallelParallelParallelParallelParallelParallelParallel
Multi-Channel ConfigurationN/AN/AN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICSOICSOICSOICSOICSOIC
Package Size: mm2:W x L, PKG28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)28SOIC: 184 mm2: 10.3 x 17.9(SOIC)
Power Consumption(Typ), mW155155155155155155155
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,Int
Resolution, Bits16161616161616
SINAD, dB89.989.989.989.989.989.989.9
SNR, dB89.989.989.989.989.989.989.9
Sample Rate (max), SPS40kSPS40kSPS40kSPS40kSPS40kSPS40kSPS40kSPS
Sample Rate(Max), MSPS0.040.040.040.040.040.040.04
THD(Typ), dB-100-100-100-100-100-100-100

Plan ecológico

ADS8507IBDWADS8507IBDWG4ADS8507IBDWRADS8507IDWADS8507IDWG4ADS8507IDWRADS8507IDWRG4
RoHSObedienteObedienteObedienteObedienteObedienteObedienteObediente

Notas de aplicación

  • Upgrading From ADS7806/07 To ADS8506/07 Devices (Rev. B)
    PDF, 88 Kb, Revisión: B, Archivo publicado: nov 27, 2007
    The information in this application report is for current applications using the Texas Instruments ADS7806/07 devices in a surface-mount SO-28 (DW) package. This document helps users with ADS78xx devices through potential compatibility issues when upgrading to the new ADS85xx part series.
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)