Datasheet Texas Instruments ADS8482 — Ficha de datos

FabricanteTexas Instruments
SerieADS8482
Datasheet Texas Instruments ADS8482

ADC paralelo de 18 bits 1MSPS con referencia, pseudo bipolar, entrada totalmente diferencial

Hojas de datos

18-Bit 1-MSPS Differential Input, Micropower Samp Analog-to-Digital Converter datasheet
PDF, 1.2 Mb, Revisión: A, Archivo publicado: jun 6, 2006
Extracto del documento

Precios

Estado

ADS8482IBRGZTADS8482IRGZT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

ADS8482IBRGZTADS8482IRGZT
N12
Pin4848
Package TypeRGZRGZ
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device Marking8482IADS
Width (mm)77
Length (mm)77
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsADS8482IBRGZT
ADS8482IBRGZT
ADS8482IRGZT
ADS8482IRGZT
# Input Channels11
Analog Voltage AVDD(Max), V5.255.25
Analog Voltage AVDD(Min), V4.754.75
ArchitectureSARSAR
Digital Supply(Max), V5.255.25
Digital Supply(Min), V2.72.7
INL(Max), +/-LSB2.52.5
Input Range(Max), V4.0964.096
Input Range(Min), V4.0964.096
Input TypeDifferentialDifferential
Integrated FeaturesOscillatorOscillator
InterfaceParallelParallel
Multi-Channel ConfigurationN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupVQFNVQFN
Package Size: mm2:W x L, PKG48VQFN: 49 mm2: 7 x 7(VQFN)48VQFN: 49 mm2: 7 x 7(VQFN)
Power Consumption(Typ), mW225225
RatingCatalogCatalog
Reference ModeExt,IntExt,Int
Resolution, Bits1818
SINAD, dB9999
SNR, dB9999
Sample Rate (max), SPS1MSPS1MSPS
Sample Rate(Max), MSPS11
THD(Typ), dB-121-121

Plan ecológico

ADS8482IBRGZTADS8482IRGZT
RoHSObedienteObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: ADS8482 (2)

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)