Datasheet Texas Instruments ADS8383 — Ficha de datos

FabricanteTexas Instruments
SerieADS8383
Datasheet Texas Instruments ADS8383

ADC paralelo de 18 bits 500KSPS

Hojas de datos

18-Bit, 500-kHz, Unipolar Input, Micropower Sampling ADC Converter datasheet
PDF, 926 Kb, Revisión: C, Archivo publicado: feb 14, 2005
Extracto del documento

Precios

Estado

ADS8383IBPFBT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

ADS8383IBPFBT
N1
Pin48
Package TypePFB
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY250
CarrierSMALL T&R
Device MarkingADS8383I
Width (mm)7
Length (mm)7
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical DataDescargar

Paramétricos

Parameters / ModelsADS8383IBPFBT
ADS8383IBPFBT
# Input Channels1
Analog Voltage AVDD(Max), V5.25
Analog Voltage AVDD(Min), V4.75
ArchitectureSAR
Digital Supply(Max), V5.25
Digital Supply(Min), V2.95
INL(Max), +/-LSB4
Input Range(Max), V4.2
Input TypePseudo-Differential,Single-Ended
Integrated FeaturesOscillator
InterfaceSPI
Multi-Channel ConfigurationN/A
Operating Temperature Range, C-40 to 85
Package GroupTQFP
Package Size: mm2:W x L, PKG48TQFP: 81 mm2: 9 x 9(TQFP)
Power Consumption(Typ), mW110
RatingCatalog
Reference ModeExt
Resolution, Bits18
SINAD, dB87
SNR, dB88
Sample Rate (max), SPS500kSPS
Sample Rate(Max), MSPS0.5
THD(Typ), dB-112

Plan ecológico

ADS8383IBPFBT
RoHSObediente

Notas de aplicación

  • Interfacing the ADS8383 to TMS320C6711 DSP
    PDF, 1.3 Mb, Archivo publicado: jun 4, 2003
    This application note presents a software and hardware interface of the ADS8383 18-bit 500 kHz analog-to-digital converter to the TMS320C6711 DSP. The hardware platform used to develop this application is ADS8383EVM and TMS320C6711 DSK. The software developed reads 1024 blocks of samples continuously from ADS8383. In an effort to reduce development time, the source code is available on TI's websit
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: ADS8383 (1)

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)