Datasheet Texas Instruments ADS8381 — Ficha de datos

FabricanteTexas Instruments
SerieADS8381
Datasheet Texas Instruments ADS8381

ADC paralelo de 18 bits 580KSPS

Hojas de datos

18-Bit, 580kHz, Unipolar Input, Micro Power Sampling Analog-to-Digital Converter datasheet
PDF, 1.0 Mb, Revisión: D, Archivo publicado: feb 9, 2005
Extracto del documento

Precios

Estado

ADS8381IBPFBTADS8381IPFBT
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

ADS8381IBPFBTADS8381IPFBT
N12
Pin4848
Package TypePFBPFB
Industry STD TermTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device MarkingADS8381IADS8381I
Width (mm)77
Length (mm)77
Thickness (mm)11
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsADS8381IBPFBT
ADS8381IBPFBT
ADS8381IPFBT
ADS8381IPFBT
# Input Channels11
Analog Voltage AVDD(Max), V5.255.25
Analog Voltage AVDD(Min), V4.754.75
ArchitectureSARSAR
Digital Supply(Max), V5.255.25
Digital Supply(Min), V2.72.7
INL(Max), +/-LSB44
Input Range(Max), V4.24.2
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesOscillatorOscillator
InterfaceParallelParallel
Multi-Channel ConfigurationN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupTQFPTQFP
Package Size: mm2:W x L, PKG48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)
Power Consumption(Typ), mW115115
RatingCatalogCatalog
Reference ModeExtExt
Resolution, Bits1818
SINAD, dB8888
SNR, dB8888
Sample Rate (max), SPS580kSPS580kSPS
Sample Rate(Max), MSPS0.580.58
THD(Typ), dB-112-112

Plan ecológico

ADS8381IBPFBTADS8381IPFBT
RoHSObedienteObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: ADS8381 (2)

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)