Datasheet Texas Instruments ADS8331 — Ficha de datos

FabricanteTexas Instruments
SerieADS8331
Datasheet Texas Instruments ADS8331

2.7C ~ 5.5V, 16 bits 500KSPS ADC serial de baja potencia

Hojas de datos

ADS833x Low-Power, 16-Bit, 500-kSPS, 4- and 8-Channel Unipolar Input Analog-to-Digital Converters With Serial Interface datasheet
PDF, 1.8 Mb, Revisión: E, Archivo publicado: agosto 9, 2016
Extracto del documento

Precios

Estado

ADS8331IBPWADS8331IBPWRADS8331IBRGERADS8331IBRGETADS8331IPWADS8331IPWRADS8331IRGERADS8331IRGET
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNo

Embalaje

ADS8331IBPWADS8331IBPWRADS8331IBRGERADS8331IBRGETADS8331IPWADS8331IPWRADS8331IRGERADS8331IRGET
N12345678
Pin2424242424242424
Package TypePWPWRGERGEPWPWRGERGE
Industry STD TermTSSOPTSSOPVQFNVQFNTSSOPTSSOPVQFNVQFN
JEDEC CodeR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-NR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-N
Package QTY60200030002506020003000250
CarrierTUBELARGE T&RLARGE T&RSMALL T&RTUBELARGE T&RLARGE T&RSMALL T&R
Device MarkingADS8331ADS8331BADSADS8331ADS83318331ADS
Width (mm)4.44.4444.44.444
Length (mm)7.87.8447.87.844
Thickness (mm)11.88.8811.88.88
Pitch (mm).65.65.5.5.65.65.5.5
Max Height (mm)1.21.2111.21.211
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsADS8331IBPW
ADS8331IBPW
ADS8331IBPWR
ADS8331IBPWR
ADS8331IBRGER
ADS8331IBRGER
ADS8331IBRGET
ADS8331IBRGET
ADS8331IPW
ADS8331IPW
ADS8331IPWR
ADS8331IPWR
ADS8331IRGER
ADS8331IRGER
ADS8331IRGET
ADS8331IRGET
# Input Channels44444444
Analog Voltage AVDD(Max), V5.55.55.55.55.55.55.55.5
Analog Voltage AVDD(Min), V2.72.72.72.72.72.72.72.7
ArchitectureSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.55.55.5
Digital Supply(Min), V1.651.651.651.651.651.651.651.65
INL(Max), +/-LSB22222222
Input Range(Max), V4.24.24.24.24.24.24.24.2
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-ChainableDaisy-Chainable
InterfaceSPISPISPISPISPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupTSSOPTSSOPVQFNVQFNTSSOPTSSOPVQFNVQFN
Package Size: mm2:W x L, PKG24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24VQFN: 16 mm2: 4 x 4(VQFN)24VQFN: 16 mm2: 4 x 4(VQFN)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)24VQFN: 16 mm2: 4 x 4(VQFN)24VQFN: 16 mm2: 4 x 4(VQFN)
Power Consumption(Typ), mW14.214.214.214.214.214.214.214.2
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExtExtExt
Resolution, Bits1616161616161616
SINAD, dB9191919191919191
SNR, dB91.591.591.591.591.591.591.591.5
Sample Rate (max), SPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS
Sample Rate(Max), MSPS0.50.50.50.50.50.50.50.5
THD(Typ), dB-101-101-101-101-101-101-101-101

Plan ecológico

ADS8331IBPWADS8331IBPWRADS8331IBRGERADS8331IBRGETADS8331IPWADS8331IPWRADS8331IRGERADS8331IRGET
RoHSObedienteObedienteSee ti.comSee ti.comObedienteObedienteSee ti.comSee ti.com

Notas de aplicación

  • Interfacing the ADS8332 to the TMS320F28335 DSP
    PDF, 145 Kb, Archivo publicado: agosto 20, 2012
    ADS8332, ADS8331 Interfacing the ADS8332 to TMS320F28335 DSP LEAVE IN MS WORD
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)