Datasheet Texas Instruments ADS7852 — Ficha de datos

FabricanteTexas Instruments
SerieADS7852
Datasheet Texas Instruments ADS7852

Convertidor analógico a digital de salida paralela de 12 bits y 8 canales

Hojas de datos

ADS7852: 12-Bit, 8-Channel, Parallel Output Analog-to-Digital Converter datasheet
PDF, 370 Kb, Revisión: C, Archivo publicado: jul 22, 2004
Extracto del documento

Precios

Estado

ADS7852Y/250ADS7852Y/250G4ADS7852Y/2KADS7852Y/2KG4ADS7852YB/250ADS7852YB/250G4ADS7852YB/2K
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNo

Embalaje

ADS7852Y/250ADS7852Y/250G4ADS7852Y/2KADS7852Y/2KG4ADS7852YB/250ADS7852YB/250G4ADS7852YB/2K
N1234567
Pin32323232323232
Package TypePBSPBSPBSPBSPBSPBSPBS
Industry STD TermTQFPTQFPTQFPTQFPTQFPTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-GS-PQFP-G
Package QTY25025020002502502000
CarrierSMALL T&RSMALL T&RLARGE T&RSMALL T&RSMALL T&RLARGE T&R
Device MarkingA52YA52YA52YBBB
Width (mm)5555555
Length (mm)5555555
Thickness (mm)1111111
Pitch (mm).5.5.5.5.5.5.5
Max Height (mm)1.21.21.21.21.21.21.2
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsADS7852Y/250
ADS7852Y/250
ADS7852Y/250G4
ADS7852Y/250G4
ADS7852Y/2K
ADS7852Y/2K
ADS7852Y/2KG4
ADS7852Y/2KG4
ADS7852YB/250
ADS7852YB/250
ADS7852YB/250G4
ADS7852YB/250G4
ADS7852YB/2K
ADS7852YB/2K
# Input Channels8888888
Analog Voltage AVDD(Max), V5.255.255.255.255.255.25
Analog Voltage AVDD(Max)(V)5.25
Analog Voltage AVDD(Min), V4.754.754.754.754.754.75
Analog Voltage AVDD(Min)(V)4.75
Approx. Price (US$)3.57 | 1ku
ArchitectureSARSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.25
Digital Supply(Max)(V)5.25
Digital Supply(Min), V4.754.754.754.754.754.75
Digital Supply(Min)(V)4.75
INL(Max), +/-LSB111111
INL(Max)(+/-LSB)1
Input Range(Max), V555555
Input Range(Max)(V)5
Input TypeSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-EndedSingle-Ended
Integrated FeaturesN/AN/AN/AN/AN/AN/AN/A
InterfaceParallelParallelParallelParallelParallelParallelParallel
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Package GroupTQFPTQFPTQFPTQFPTQFPTQFPTQFP
Package Size: mm2:W x L, PKG32TQFP: 49 mm2: 7 x 7(TQFP)32TQFP: 49 mm2: 7 x 7(TQFP)32TQFP: 49 mm2: 7 x 7(TQFP)32TQFP: 49 mm2: 7 x 7(TQFP)32TQFP: 49 mm2: 7 x 7(TQFP)32TQFP: 49 mm2: 7 x 7(TQFP)
Package Size: mm2:W x L (PKG)32TQFP: 49 mm2: 7 x 7(TQFP)
Power Consumption(Typ), mW131313131313
Power Consumption(Typ)(mW)13
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt
Int
Ext,IntExt,IntExt,Int
Resolution, Bits121212121212
Resolution(Bits)12
SINAD, dBN/AN/AN/AN/AN/AN/A
SINAD(dB)N/A
SNR, dB727272727272
SNR(dB)72
Sample Rate (max), SPS500kSPS500kSPS500kSPS500kSPS500kSPS500kSPS
Sample Rate (max)(SPS)500kSPS
Sample Rate(Max), MSPS0.50.50.50.50.50.5
THD(Typ), dB-77-77-77-77-77-77
THD(Typ)(dB)-77

Plan ecológico

ADS7852Y/250ADS7852Y/250G4ADS7852Y/2KADS7852Y/2KG4ADS7852YB/250ADS7852YB/250G4ADS7852YB/2K
RoHSObedienteObedienteObedienteDesobedienteObedienteObedienteObediente
Pb gratisNo

Notas de aplicación

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)