Datasheet Texas Instruments ADS7229 — Ficha de datos

FabricanteTexas Instruments
SerieADS7229
Datasheet Texas Instruments ADS7229

Entrada unipolar de baja potencia, 12 bits, 1 MHz, simple / doble, ADC con interfaz en serie

Hojas de datos

LOW-POWER, 12-BIT, 1MHz, SINGLE/DUAL UNIPOLAR INPUT, ADC w/SERIAL INTERFACE datasheet
PDF, 1.5 Mb, Revisión: A, Archivo publicado: jun 18, 2009
Extracto del documento

Precios

Estado

ADS7229IPWADS7229IPWG4ADS7229IPWRADS7229IPWRG4ADS7229IRSARADS7229IRSATADS7229IRSATG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNo

Embalaje

ADS7229IPWADS7229IPWG4ADS7229IPWRADS7229IPWRG4ADS7229IRSARADS7229IRSATADS7229IRSATG4
N1234567
Pin16161616161616
Package TypePWPWPWPWRSARSARSA
Industry STD TermTSSOPTSSOPTSSOPTSSOPVQFNVQFNVQFN
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY9090200020003000250250
CarrierTUBETUBELARGE T&RLARGE T&RLARGE T&RSMALL T&RSMALL T&R
Device MarkingADSADS7229I A7229I A7229I AADSADS
Width (mm)4.44.44.44.4444
Length (mm)5555444
Thickness (mm)1111.9.9.9
Pitch (mm).65.65.65.65.65.65.65
Max Height (mm)1.21.21.21.2111
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsADS7229IPW
ADS7229IPW
ADS7229IPWG4
ADS7229IPWG4
ADS7229IPWR
ADS7229IPWR
ADS7229IPWRG4
ADS7229IPWRG4
ADS7229IRSAR
ADS7229IRSAR
ADS7229IRSAT
ADS7229IRSAT
ADS7229IRSATG4
ADS7229IRSATG4
# Input Channels1111111
Analog Voltage AVDD(Max), V5.55.55.55.55.55.55.5
Analog Voltage AVDD(Min), V2.72.72.72.72.72.72.7
ArchitectureSARSARSARSARSARSARSAR
Digital Supply(Max), V5.55.55.55.55.55.55.5
Digital Supply(Min), V1.651.651.651.651.651.651.65
INL(Max), +/-LSB0.50.50.50.50.50.50.5
Input Range(Max), V5.55.55.55.55.55.55.5
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,OscillatorDaisy-Chainable,Oscillator
InterfaceSerialSerialSerialSerialSerialSerialSerial
Multi-Channel ConfigurationN/AN/AN/AN/AN/AN/AN/A
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupTSSOPTSSOPTSSOPTSSOPQFNQFNQFN
Package Size: mm2:W x L, PKG16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16QFN: 16 mm2: 4 x 4(QFN)16QFN: 16 mm2: 4 x 4(QFN)16QFN: 16 mm2: 4 x 4(QFN)
Power Consumption(Typ), mW13.713.713.713.713.713.713.7
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExtExtExtExt
Resolution, Bits12121212121212
SINAD, dB73.773.773.773.773.773.773.7
SNR, dB73.973.973.973.973.973.973.9
Sample Rate (max), SPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS1MSPS
Sample Rate(Max), MSPS1111111
THD(Typ), dB-88.5-88.5-88.5-88.5-88.5-88.5-88.5

Plan ecológico

ADS7229IPWADS7229IPWG4ADS7229IPWRADS7229IPWRG4ADS7229IRSARADS7229IRSATADS7229IRSATG4
RoHSObedienteObedienteObedienteObedienteObedienteObedienteObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)