Datasheet Texas Instruments ADS58C23 — Ficha de datos
Fabricante | Texas Instruments |
Serie | ADS58C23 |
Receptor IF BTS de doble canal con procesamiento de señal para 3G + LTE multimodo
Hojas de datos
ADS58C20 and ADS58C23 Features datasheet
PDF, 695 Kb, Archivo publicado: jun 30, 2011
Extracto del documento
Precios
Estado
ADS58C23IPFP | ADS58C23IPFPR | |
---|---|---|
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No | No |
Embalaje
ADS58C23IPFP | ADS58C23IPFPR | |
---|---|---|
N | 1 | 2 |
Pin | 80 | 80 |
Package Type | PFP | PFP |
Industry STD Term | HTQFP | HTQFP |
JEDEC Code | S-PQFP-G | S-PQFP-G |
Package QTY | 96 | 1000 |
Carrier | JEDEC TRAY (10+1) | LARGE T&R |
Device Marking | ADS58C23I | ADS58C23I |
Width (mm) | 12 | 12 |
Length (mm) | 12 | 12 |
Thickness (mm) | 1 | 1 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1.2 | 1.2 |
Mechanical Data | Descargar | Descargar |
Paramétricos
Parameters / Models | ADS58C23IPFP | ADS58C23IPFPR |
---|---|---|
# Input Channels | 2 | 2 |
Analog Input BW, MHz | 750 | 750 |
Analog Voltage AVDD(Max), V | 3.45 | 3.45 |
Analog Voltage AVDD(Min), V | 3.15 | 3.15 |
Interface | Parallel LVDS | Parallel LVDS |
Logic Voltage DV/DD(Max), V | 2.0 | 2.0 |
Logic Voltage DV/DD(Min), V | 1.7 | 1.7 |
Operating Temperature Range, C | -40 to 85 | -40 to 85 |
Package Group | HTQFP | HTQFP |
Package Size: mm2:W x L, PKG | 80HTQFP: 196 mm2: 14 x 14(HTQFP) | 80HTQFP: 196 mm2: 14 x 14(HTQFP) |
Power Consumption(Typ), mW | 1630 | 1630 |
Resolution, Bits | 14 | 14 |
SFDR(Typ), dB | 94 | 94 |
SNR(Typ), dB | 75 | 75 |
Sample Rate(Max), MSPS | 250 | 250 |
Special Features | Decimating Filter,Differential Inputs,Nap Mode,Out of Range Indicator,Power Down | Decimating Filter,Differential Inputs,Nap Mode,Out of Range Indicator,Power Down |
Plan ecológico
ADS58C23IPFP | ADS58C23IPFPR | |
---|---|---|
RoHS | Obediente | Obediente |
Notas de aplicación
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The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil - Band-Pass Filter Design Techniques for High-Speed ADCsPDF, 733 Kb, Archivo publicado: feb 27, 2012
Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
Linea modelo
Serie: ADS58C23 (2)
Clasificación del fabricante
- Semiconductors> RF & Microwave> Wideband Receivers