Datasheet Texas Instruments ADS54RF63 — Ficha de datos

FabricanteTexas Instruments
SerieADS54RF63
Datasheet Texas Instruments ADS54RF63

12 bits, 550-MSPS, convertidor analógico a digital de muestreo de RF (ADC)

Hojas de datos

12-Bit 500-/550-MSPS Analog-to-Digital Converters datasheet
PDF, 2.0 Mb, Revisión: E, Archivo publicado: jul 1, 2009
Extracto del documento

Precios

Estado

ADS54RF63IPFPADS54RF63IPFPR
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

ADS54RF63IPFPADS54RF63IPFPR
N12
Pin8080
Package TypePFPPFP
Industry STD TermHTQFPHTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY961000
CarrierJEDEC TRAY (10+1)LARGE T&R
Device MarkingADS54RF63IADS54RF63I
Width (mm)1212
Length (mm)1212
Thickness (mm)11
Pitch (mm).5.5
Max Height (mm)1.21.2
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsADS54RF63IPFP
ADS54RF63IPFP
ADS54RF63IPFPR
ADS54RF63IPFPR
# Input Channels11
Analog Input BW, MHz23002300
ArchitecturePipelinePipeline
DNL(Max), +/-LSB0.950.95
DNL(Typ), +/-LSB0.50.5
ENOB, Bits9.99.9
INL(Max), +/-LSB2.52.5
INL(Typ), +/-LSB0.70.7
Input BufferYesYes
Input Range, Vp-p2.22.2
InterfaceParallel LVDSParallel LVDS
Operating Temperature Range, C-40 to 85-40 to 85
Package GroupHTQFPHTQFP
Package Size: mm2:W x L, PKG80HTQFP: 196 mm2: 14 x 14(HTQFP)80HTQFP: 196 mm2: 14 x 14(HTQFP)
Power Consumption(Typ), mW22502250
RatingCatalogCatalog
Reference ModeExt,IntExt,Int
Resolution, Bits1212
SFDR, dB7676
SINAD, dB61.361.3
SNR, dB62.662.6
Sample Rate(Max), MSPS550550

Plan ecológico

ADS54RF63IPFPADS54RF63IPFPR
RoHSObedienteObediente

Notas de aplicación

  • Clock jitter analyzed in the time domain, Part 1
    PDF, 302 Kb, Archivo publicado: agosto 11, 2010
  • Clock jitter analyzed in the time domain, Part 2
    PDF, 588 Kb, Archivo publicado: nov 15, 2010
  • Clock jitter analyzed in the time domain, Part 3
    PDF, 627 Kb, Archivo publicado: sept 16, 2011
  • 4Q 2010 Issue Analog Applications Journal
    PDF, 1.3 Mb, Archivo publicado: nov 15, 2010
  • Signal Chain Noise Figure Analysis
    PDF, 615 Kb, Archivo publicado: oct 29, 2014
  • 3Q 2010 Issue Analog Applications Journal
    PDF, 1.5 Mb, Archivo publicado: agosto 11, 2010
  • High-Speed Analog-to-Digital Converter Basics
    PDF, 1.1 Mb, Archivo publicado: enero 11, 2012
    The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
  • 3Q 2011 Issue Analog Applications Journal
    PDF, 1.4 Mb, Archivo publicado: sept 16, 2011
  • Журнал РїРѕ применению аналоговых компонентов 3Q 2011
    PDF, 3.9 Mb, Archivo publicado: sept 1, 2011
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Kb, Archivo publicado: sept 4, 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Kb, Archivo publicado: abr 28, 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Kb, Revisión: A, Archivo publicado: sept 10, 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, Archivo publicado: jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revisión: A, Archivo publicado: abr 16, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revisión: B, Archivo publicado: oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revisión: A, Archivo publicado: mayo 18, 2015

Linea modelo

Serie: ADS54RF63 (2)

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)