Datasheet Texas Instruments ADC12D1600RF — Ficha de datos

Fabricante	Texas Instruments
Serie	ADC12D1600RF

Hojas de datos

Precios

Estado

Embalaje

Paramétricos

Parameters / Models	ADC12D1600RFIUT	ADC12D1600RFIUT/NOPB
# Input Channels	2,1	2,1
Analog Input BW, MHz	2700	2700
Architecture	Folding Interpolating	Folding Interpolating
DNL(Max), +/-LSB	0.4	0.4
DNL(Typ), +/-LSB	0.4	0.4
ENOB, Bits	9.4	9.4
INL(Max), +/-LSB	2.5	2.5
INL(Typ), +/-LSB	2.5	2.5
Input Buffer	Yes	Yes
Input Range, Vp-p	0.8	0.8
Interface	Parallel LVDS	Parallel LVDS
Operating Temperature Range, C	-40 to 85	-40 to 85
Package Group	BGA	BGA
Package Size: mm2:W x L, PKG	292BGA: 729 mm2: 27 x 27(BGA)	292BGA: 729 mm2: 27 x 27(BGA)
Power Consumption(Typ), mW	3880	3880
Rating	Catalog	Catalog
Reference Mode	Int	Int
Resolution, Bits	12	12
SFDR, dB	67.9	67.9
SINAD, dB	58	58
SNR, dB	59	59
Sample Rate(Max), MSPS	1600,3200	1600,3200

Plan ecológico

Notas de aplicación

• Descargar
  Signal Chain Noise Figure Analysis
  PDF, 615 Kb, Archivo publicado: oct 29, 2014
• Descargar
  Wide Bandwidth Receiver Implementation by Interleaving Two Giga-Sampling ADCs
  PDF, 621 Kb, Archivo publicado: dic 7, 2015
• Descargar
  Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs
  PDF, 943 Kb, Archivo publicado: agosto 6, 2014
• Descargar
  AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C)
  PDF, 60 Kb, Revisión: C, Archivo publicado: mayo 1, 2013
  In order to facilitate upgrading applications from a 10-bit Gig ADC to a 12-bit Gig ADC, the ADC10D1x00(ADC10D1500/ADC10D1000) is designed to be pin-compatible with the ADC12D1x00(ADC12D1800/1600/1000). This means that a single board layout may be designed with both resolutionADCs in mind for more cost efficient and time-to-market product development.
• Descargar
  AN-2177 Using the LMH6554 as a ADC Driver (Rev. A)
  PDF, 1.7 Mb, Revisión: A, Archivo publicado: abr 26, 2013
  This application report discusses the use of the Texas Instruments LMH6554 as an ADC driver.
• Descargar
  From Sample Instant to Data Output: Understanding Latency in the GSPS ADC
  PDF, 392 Kb, Archivo publicado: dic 18, 2012
  For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products,
• Descargar
  AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)
  PDF, 169 Kb, Revisión: G, Archivo publicado: feb 3, 2017
• Descargar
  Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat
  PDF, 720 Kb, Archivo publicado: dic 9, 2013
  The SFDR performance of an ADC is limited by the largest spur in the spectrum from DC to Fs / 2. These spurs can either be reduced or avoided entirely for maximum SFDR performance, based on the application. This reference design explores the reason behind spurs in the 10-bit and 12-bit GSPS ADCfamily. The specific products covered are: ADC12D1800RF, ADC12D1600RF, ADC12D1000RF, ADC12D800RF, ADC12

Linea modelo

Clasificación del fabricante

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)