Datasheet Texas Instruments 74ACT16841 — Ficha de datos

FabricanteTexas Instruments
Serie74ACT16841
Datasheet Texas Instruments 74ACT16841

Cierres tipo D de interfaz de bus de 20 bits con salidas de 3 estados

Hojas de datos

20-Bit Bus Interface D-Type Latches With 3-State Outputs datasheet
PDF, 126 Kb, Revisión: A, Archivo publicado: abr 1, 1996
Extracto del documento

Precios

Estado

74ACT16841DL74ACT16841DLG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

74ACT16841DL74ACT16841DLG4
N12
Pin5656
Package TypeDLDL
Industry STD TermSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY2020
CarrierTUBETUBE
Device MarkingACT16841ACT16841
Width (mm)7.497.49
Length (mm)18.4118.41
Thickness (mm)2.592.59
Pitch (mm).635.635
Max Height (mm)2.792.79
Mechanical DataDescargarDescargar

Paramétricos

Parameters / Models74ACT16841DL
74ACT16841DL
74ACT16841DLG4
74ACT16841DLG4
3-State OutputYesYes
Bits2020
F @ Nom Voltage(Max), Mhz9090
ICC @ Nom Voltage(Max), mA0.080.08
Operating Temperature Range, C-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-24
Package GroupSSOPSSOP
Package Size: mm2:W x L, PKG56SSOP: 191 mm2: 10.35 x 18.42(SSOP)56SSOP: 191 mm2: 10.35 x 18.42(SSOP)
RatingCatalogCatalog
Schmitt TriggerNoNo
Technology FamilyACTACT
VCC(Max), V5.55.5
VCC(Min), V4.54.5
Voltage(Nom), V55
tpd @ Nom Voltage(Max), ns12.212.2

Plan ecológico

74ACT16841DL74ACT16841DLG4
RoHSObedienteObediente

Notas de aplicación

  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • Introduction to Logic
    PDF, 93 Kb, Archivo publicado: abr 30, 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revisión: D, Archivo publicado: jun 23, 2016
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Linea modelo

Serie: 74ACT16841 (2)

Clasificación del fabricante

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch