Datasheet Texas Instruments 74ACT16823 — Ficha de datos

FabricanteTexas Instruments
Serie74ACT16823
Datasheet Texas Instruments 74ACT16823

Chanclas de interfaz de bus de 18 bits con salidas de 3 estados

Hojas de datos

18-Bit Bus Interface Flip-Flops With 3-State Outputs datasheet
PDF, 344 Kb, Revisión: A, Archivo publicado: abr 1, 1996
Extracto del documento

Precios

Estado

74ACT16823DL74ACT16823DLG474ACT16823DLR
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNo

Embalaje

74ACT16823DL74ACT16823DLG474ACT16823DLR
N123
Pin565656
Package TypeDLDLDL
Industry STD TermSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY20201000
CarrierTUBETUBELARGE T&R
Device MarkingACT16823ACT16823ACT16823
Width (mm)7.497.497.49
Length (mm)18.4118.4118.41
Thickness (mm)2.592.592.59
Pitch (mm).635.635.635
Max Height (mm)2.792.792.79
Mechanical DataDescargarDescargarDescargar

Paramétricos

Parameters / Models74ACT16823DL
74ACT16823DL
74ACT16823DLG4
74ACT16823DLG4
74ACT16823DLR
74ACT16823DLR
3-State OutputYesYesYes
Bits181818
F @ Nom Voltage(Max), Mhz909090
ICC @ Nom Voltage(Max), mA0.080.080.08
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-24
Package GroupSSOPSSOPSSOP
Package Size: mm2:W x L, PKG56SSOP: 191 mm2: 10.35 x 18.42(SSOP)56SSOP: 191 mm2: 10.35 x 18.42(SSOP)56SSOP: 191 mm2: 10.35 x 18.42(SSOP)
RatingCatalogCatalogCatalog
Schmitt TriggerNoNoNo
Technology FamilyACTACTACT
VCC(Max), V5.55.55.5
VCC(Min), V4.54.54.5
Voltage(Nom), V555
tpd @ Nom Voltage(Max), ns12.912.912.9

Plan ecológico

74ACT16823DL74ACT16823DLG474ACT16823DLR
RoHSObedienteObedienteObediente

Notas de aplicación

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    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
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    PDF, 260 Kb, Revisión: D, Archivo publicado: jun 23, 2016
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, Archivo publicado: agosto 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, Archivo publicado: abr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop