Datasheet Texas Instruments TLV1548QDBREP — Ficha de datos

Producto mejorado de bajo voltaje Adc de 10 bits con control en serie y 8 entradas analógicas 20-SSOP -40 a 125

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PDF, 686 Kb, Revisión: A, Archivo publicado: dic 5, 2003

Extracto del documento

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

# Input Channels	8
Analog Voltage AVDD(Max)	5.5 V
Analog Voltage AVDD(Min)	2.7 V
Architecture	SAR
Digital Supply(Max)	5.5 V
Digital Supply(Min)	2.7 V
INL(Max)	1 +/-LSB
Interface	SPI
Operating Temperature Range	-40 to 125 C
Package Group	SSOP
Package Size: mm2:W x L	20SSOP: 56 mm2: 7.8 x 7.2(SSOP) PKG
Power Consumption(Typ)	1.05 mW
Rating	HiRel Enhanced Product
Reference Mode	Ext
Resolution	10 Bits
Sample Rate (max)	85kSPS SPS

RoHS

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Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
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This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
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PDF, 215 Kb, Archivo publicado: marzo 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Serie: TLV1548-EP (2)

Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters