Datasheet Texas Instruments DAC5672MPFBEP — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | DAC5672-EP |
| Numero de parte | DAC5672MPFBEP |
Producto mejorado Dual 14-Bit 200-Msps Digital-to-Analog Converter 48-TQFP -55 to 125
Hojas de datos
DAC5672-EP datasheet
PDF, 1.2 Mb, Revisión: A, Archivo publicado: oct 10, 2006
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 48 |
| Package Type | PFB |
| Industry STD Term | TQFP |
| JEDEC Code | S-PQFP-G |
| Package QTY | 250 |
| Carrier | JEDEC TRAY (10+1) |
| Device Marking | DAC5672EP |
| Width (mm) | 7 |
| Length (mm) | 7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Descargar |
Paramétricos
| Architecture | Current Source |
| DAC Channels | 2 |
| DNL(Max) | 3 +/-LSB |
| INL(Max) | 4 +/-LSB |
| Interface | Parallel CMOS |
| Operating Temperature Range | -55 to 125 C |
| Output Range Max. | 20 mA |
| Output Range Min. | 2 mA |
| Output Type | Current |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 330 mW |
| Rating | HiRel Enhanced Product |
| Reference: Type | Int |
| Resolution | 14 Bits |
| SFDR | 84 dB |
| SNR | 77 dB |
| Sample / Update Rate | 275 MSPS |
| Settling Time | 0.02 µs |
Plan ecológico
| RoHS | Obediente |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- High Speed Digital-to-Analog Converters Basics (Rev. A)PDF, 829 Kb, Revisión: A, Archivo publicado: oct 23, 2012
- Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, Archivo publicado: jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, Archivo publicado: jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
Linea modelo
Serie: DAC5672-EP (4)
- DAC5672MPFBEP DAC5672MPFBREP V62/06639-01XE V62/06639-02XE
Clasificación del fabricante
- Semiconductors > Space & High Reliability > Data Converter > Digital to Analog Converters