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ADS8410IRGZT

Datasheet Texas Instruments ADS8410IRGZT — Ficha de datos

FabricanteTexas Instruments
SerieADS8410
Numero de parteADS8410IRGZT
Datasheet Texas Instruments ADS8410IRGZT

Entrada de pseudodifusión unipolar de 16 bits, frecuencia de muestreo de 2MSPS, ADC de 4.75V a 5.25V con LVDS Serial Interf 48-VQFN -40 a 85

Hojas de datos

Descargar
16-Bit, 2-MSPS, LVDS Serial Interface, SAR ADC. datasheet
PDF, 999 Kb, Revisión: A, Archivo publicado: mayo 5, 2013
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin48
Package TypeRGZ
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Package QTY250
CarrierSMALL T&R
Device MarkingADS8410I
Width (mm)7
Length (mm)7
Thickness (mm).9
Pitch (mm).5
Max Height (mm)1
Mechanical DataDescargar

Paramétricos

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)2.5 +/-LSB
Input Range(Max)4.1 V
Input TypePseudo-Differential,Single-Ended
Integrated FeaturesDaisy-Chainable,Oscillator
InterfaceParallel
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L48VQFN: 49 mm2: 7 x 7(VQFN) PKG
Power Consumption(Typ)155 mW
RatingCatalog
Reference ModeExt,Int
Resolution16 Bits
SINAD87 dB
SNR87.5 dB
Sample Rate (max)2MSPS SPS
Sample Rate(Max)2 MSPS
THD(Typ)-98 dB

Plan ecológico

RoHSObediente

Notas de aplicación

  • Descargar
    Connecting ADS8410/13 With Long Cable
    PDF, 773 Kb, Archivo publicado: dic 2, 2005
    Many applications require that the analog-to-digital converter (ADC) be located near the field sensor; however, the digital processing often occurs at a distance. Therefore, the input and output signals need to travel through a long cable from the field sensor to the site where digital processing occurs. This application report is a guide for using a 1-meter cable, the Samtec EQCD Series high data
  • Descargar
    Using ADS8410/13 in Daisy Chain Mode
    PDF, 3.2 Mb, Archivo publicado: mayo 22, 2006
    Many applications require multiple analog-to-digital converters (ADC) in a system. Daisy chaining multiple ADCs enables the use of a single data receiver or a small FPGA. It offers easy and minimal digital routing. This application report describes how multiple ADCs (ADS8410/13) work in a daisy-chain mode. The device offers a high-speed (200 Mbps) LVDS serial interface. This application report als
  • Descargar
    Using ADS8410/13 in Cascade Mode
    PDF, 2.9 Mb, Archivo publicado: jun 8, 2006
    Many applications require multiple analog-to-digital converters (ADC) in a system. Cascading multiple ADCs enables the use of a single data receiver or a small FPGA. This offers lower power consumption and independent ADC usage. This application report describes how multiple ADCs (ADS8410/13) work in a cascade mode. The ADS8410/13 integrated circuit offers a high-speed (200 Mbps) LVDS serial inter
  • Descargar
    Using ADS8411 in a Multiplexed Analog Input Application (Rev. A)
    PDF, 2.1 Mb, Revisión: A, Archivo publicado: feb 15, 2006
    This application report is intended as a guide for using an analog multiplexer to multiplex several input signals to a single high-resolution, high-speed SAR analog-to-digital converter (ADC). The ADC and the multiplexer used were the ADS8411 and the TS5A3159/3359, respectively. This document discusses the important parameters of a multiplexer and defines a few important measurements for evaluatin
  • Descargar
    Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Descargar
    Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: ADS8410 (2)

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)