Datasheet Texas Instruments ADS8344NB/1K — Ficha de datos

FabricanteTexas Instruments
SerieADS8344
Numero de parteADS8344NB/1K
Datasheet Texas Instruments ADS8344NB/1K

Convertidor analógico a digital de muestreo de salida serie de 16 bits y 8 canales 20-SSOP -40 a 85

Hojas de datos

16-Bit, 8-Channel Serial Output Sampling Analog-to-Digital Converter datasheet
PDF, 1.1 Mb, Revisión: E, Archivo publicado: sept 28, 2006
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin2020
Package TypeDBDB
Industry STD TermSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY10001000
CarrierLARGE T&RLARGE T&R
Device MarkingBADS8344N
Width (mm)5.35.3
Length (mm)7.27.2
Thickness (mm)1.951.95
Pitch (mm).65.65
Max Height (mm)22
Mechanical DataDescargarDescargar

Paramétricos

# Input Channels8
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)6 +/-LSB
Input Range(Max)5.25 V
Input TypePseudo-Differential,Single-Ended
Integrated FeaturesN/A
InterfaceSerial
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85 C
Package GroupSSOP
Package Size: mm2:W x L20SSOP: 52 mm2: 6 x 8.65(SSOP) PKG
Power Consumption(Typ)3.2 mW
RatingCatalog
Reference ModeExt
Resolution16 Bits
SINAD86 dB
SNR89 dB
Sample Rate (max)100kSPS SPS
Sample Rate(Max)0.1 MSPS
THD(Typ)-90 dB

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: ADS8344EVM
    ADS8344 Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)