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ADC12D500RFIUT/NOPB

Datasheet Texas Instruments ADC12D500RFIUT/NOPB — Ficha de datos

FabricanteTexas Instruments
SerieADC12D500RF
Numero de parteADC12D500RFIUT/NOPB
Datasheet Texas Instruments ADC12D500RFIUT/NOPB

12 bits, Dual 500-MSPS o Single 1.0-GSPS, Convertidor analógico a digital de muestreo de RF (ADC) 292-BGA -40 a 85

Hojas de datos

Descargar
ADC12D800/500RF 12-Bit, 1.6/1.0 GSPS RF Sampling ADC datasheet
PDF, 2.0 Mb, Revisión: E, Archivo publicado: marzo 25, 2013
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteSí

Embalaje

Pin292
Package TypeNXA
Industry STD TermBGA
JEDEC CodeS-PBGA-N
Package QTY40
CarrierJEDEC TRAY (10+1)
Device MarkingADC12D500RFIUT
Width (mm)27
Length (mm)27
Thickness (mm)2.38
Pitch (mm)1.27
Max Height (mm)2.4
Mechanical DataDescargar

Paramétricos

# Input Channels2,1
Analog Input BW2700 MHz
ArchitectureFolding Interpolating
DNL(Max)0.4 +/-LSB
DNL(Typ)0.4 +/-LSB
ENOB9.7 Bits
INL(Max)2.5 +/-LSB
INL(Typ)2.5 +/-LSB
Input BufferYes
Input Range0.8 Vp-p
InterfaceParallel LVDS
Operating Temperature Range-40 to 85 C
Package GroupBGA
Package Size: mm2:W x L292BGA: 729 mm2: 27 x 27(BGA) PKG
Power Consumption(Typ)2020 mW
RatingCatalog
Reference ModeInt
Resolution12 Bits
SFDR74.3 dB
SINAD60 dB
SNR60.4 dB
Sample Rate(Max)500,1000 MSPS

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: ADC12D800RFRB
    12-Bit, Dual 800 MSPS or Single 1.6 GSPS A/D Converter Reference Board
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Descargar
    From Sample Instant to Data Output: Understanding Latency in the GSPS ADC
    PDF, 392 Kb, Archivo publicado: dic 18, 2012
    For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products,
  • Descargar
    Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat
    PDF, 720 Kb, Archivo publicado: dic 9, 2013
    The SFDR performance of an ADC is limited by the largest spur in the spectrum from DC to Fs / 2. These spurs can either be reduced or avoided entirely for maximum SFDR performance, based on the application. This reference design explores the reason behind spurs in the 10-bit and 12-bit GSPS ADCfamily. The specific products covered are: ADC12D1800RF, ADC12D1600RF, ADC12D1000RF, ADC12D800RF, ADC12
  • Descargar
    AN-2177 Using the LMH6554 as a ADC Driver (Rev. A)
    PDF, 1.7 Mb, Revisión: A, Archivo publicado: abr 26, 2013
    This application report discusses the use of the Texas Instruments LMH6554 as an ADC driver.
  • Descargar
    Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs
    PDF, 943 Kb, Archivo publicado: agosto 6, 2014
  • Descargar
    AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)
    PDF, 169 Kb, Revisión: G, Archivo publicado: feb 3, 2017

Linea modelo

Serie: ADC12D500RF (2)

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)