Datasheet Texas Instruments 5962-9065401MEA — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | CD54HCT4051 |
| Numero de parte | 5962-9065401MEA |
Multiplexores / demultiplexores analógicos lógicos CMOS de alta velocidad 16-CDIP -55 a 125
Hojas de datos
CDx4HC405x, CDx4HCT405x High-Speed CMOS Logic Analog Multiplexers and Demultiplexers datasheet
PDF, 1.5 Mb, Revisión: L, Archivo publicado: feb 6, 2017
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 16 |
| Package Type | J |
| Industry STD Term | CDIP |
| JEDEC Code | R-GDIP-T |
| Package QTY | 1 |
| Carrier | TUBE |
| Width (mm) | 6.92 |
| Length (mm) | 19.56 |
| Thickness (mm) | 4.57 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Descargar |
Paramétricos
| Bandwidth(Max) | 180 MHz |
| Features | Low Power,Low Crosstalk,Break-before-make |
| Operating Temperature Range | -55 to 125 C |
| Package Group | CDIP |
| Package Size: mm2:W x L | See datasheet (CDIP) PKG |
| Rating | Military |
| Ron(Max) | 130 Ohms |
| Ron(Typ) | 45 Ohms |
| Schmitt Trigger | No |
| Technology Family | HCT |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
Plan ecológico
| RoHS | See ti.com |
Notas de aplicación
- Semiconductor Packing Material Electrostatic Discharge (ESD) ProtectionPDF, 337 Kb, Archivo publicado: jul 8, 2004
Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge - Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)PDF, 614 Kb, Revisión: C, Archivo publicado: dic 2, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, Archivo publicado: abr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren - SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, Archivo publicado: mayo 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal - Designing With Logic (Rev. C)PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - Implications of Slow or Floating CMOS Inputs (Rev. D)PDF, 260 Kb, Revisión: D, Archivo publicado: jun 23, 2016
- TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Kb, Archivo publicado: agosto 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
Linea modelo
Serie: CD54HCT4051 (2)
- 5962-9065401MEA CD54HCT4051F3A
Clasificación del fabricante
- Semiconductors > Space & High Reliability > Logic Products > Switches and Multiplexer > Multiplexers/Demultiplexers (Mux/Demux)
Otros nombres:
59629065401MEA, 5962 9065401MEA