Datasheet Texas Instruments ADC08D1520CIYB — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | ADC08D1520 |
| Numero de parte | ADC08D1520CIYB |
Convertidor analógico a digital de 8 bits, doble 1.5-GSPS o simple 3.0-GSPS (ADC) 128-HLQFP -40 a 85
Hojas de datos
ADC08D1520 Low Power, 8-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter datasheet
PDF, 886 Kb, Revisión: D, Archivo publicado: marzo 14, 2013
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | NRND (No recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 128 | 128 |
| Package Type | NNB | NNB |
| Industry STD Term | HLQFP | HLQFP |
| JEDEC Code | S-PQFP-N | S-PQFP-N |
| Package QTY | 60 | 60 |
| Carrier | JEDEC TRAY (10+1) | JEDEC TRAY (10+1) |
| Device Marking | CIYB | ADC08D1520 |
| Width (mm) | 20 | 20 |
| Length (mm) | 20 | 20 |
| Thickness (mm) | 1.4 | 1.4 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.6 | 1.6 |
| Mechanical Data | Descargar | Descargar |
Reemplazos
| Replacement | ADC08D1520CIYB/NOPB |
| Replacement Code | S |
Paramétricos
| # Input Channels | 2,1 |
| Analog Input BW | 2000 MHz |
| Architecture | Folding Interpolating |
| DNL(Max) | 0.15 +/-LSB |
| DNL(Typ) | 0.15 +/-LSB |
| ENOB | 7.4 Bits |
| INL(Max) | 0.3 +/-LSB |
| INL(Typ) | 0.3 +/-LSB |
| Input Buffer | Yes |
| Input Range | 0.87 Vp-p |
| Interface | Parallel LVDS |
| Operating Temperature Range | -40 to 85 C |
| Package Group | HLQFP |
| Package Size: mm2:W x L | 128HLQFP: 484 mm2: 22 x 22(HLQFP) PKG |
| Power Consumption(Typ) | 2000 mW |
| Rating | Catalog |
| Reference Mode | Int |
| Resolution | 8 Bits |
| SFDR | 58 dB |
| SINAD | 46.5 dB |
| SNR | 46.8 dB |
| Sample Rate(Max) | 1500,3000 MSPS |
Plan ecológico
| RoHS | See ti.com |
Kits de diseño y Módulos de evaluación
- Evaluation Modules & Boards: ADC08D1520RB
The ADC08D1520RB: Low-Power, 8-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter Reference Board
Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)
Notas de aplicación
- AN-1558 Clocking High-Speed A/D Converters (Rev. B)PDF, 1.2 Mb, Revisión: B, Archivo publicado: mayo 1, 2013
Extremely high-speed ADCs (>1 GSPS) demand a low-jitter sample clock in order to preserve signal-tonoiseratio (SNR). These 8- and 10-bit converters have best-case noise floors set by quantization noise.For an N-bit ADC sampling a full-scale sinusoid, the well known expression for SNR (in dB) is: SNR =6.02N + 1.76. This sets the best case noise floor for an 8-bit ADC at в€’49.9 dBc. The noise f
Linea modelo
Serie: ADC08D1520 (2)
- ADC08D1520CIYB ADC08D1520CIYB/NOPB
Clasificación del fabricante
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)