DS26C32AM, DS26C32AT
www.ti.com SNLS382C – JUNE 1998 – REVISED APRIL 2013 DS26C32AT/DS26C32AM Quad Differential Line Receiver
Check for Samples: DS26C32AM, DS26C32AT FEATURES DESCRIPTION The DS26C32A is a quad differential line receiver
designed to meet the RS-422, RS-423, and Federal
Standards 1020 and 1030 for balanced and
unbalanced digital data transmission, while retaining
the low power characteristics of CMOS. 1 2 CMOS Design for Low Power
В±0.2V Sensitivity over Input Common Mode
Voltage Range
Typical Propagation Delays: 19 ns
Typical Input hysteresis: 60 mV
Inputs Won't Load Line When VCC = 0V
Meets the Requirements of EIA Standard RS422
TRI-STATE Outputs for Connection to System
Buses
Available in Surface Mount
Mil-Std-883C Compliant The DS26C32A has an input sensitivity of 200 mV
over the common mode input voltage range of В±7V.
The DS26C32A features internal pull-up and pulldown resistors which prevent output oscillation on
unused channels.
The DS26C32A provides an enable and disable
function common to all four receivers. It also features
TRI-STATE outputs with 6 mA source and sink …
