Datasheet Texas Instruments 74ACT11074DBLE — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | 74ACT11074 |
| Numero de parte | 74ACT11074DBLE |
Chanclas duales de tipo D activadas por borde positivo con claro y preestablecido 14-SSOP -40 a 85
Hojas de datos
Dual D-Type Positive-Edge-Triggered Flip Flop With Clear And Preset datasheet
PDF, 877 Kb, Revisión: A, Archivo publicado: abr 1, 1996
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 14 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 5.3 |
| Length (mm) | 6.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | Descargar |
Paramétricos
| 3-State Output | No |
| Approx. Price (US$) | 0.94 | 1ku |
| Bits(#) | 2 |
| F @ Nom Voltage(Max)(Mhz) | 90 |
| ICC @ Nom Voltage(Max)(mA) | 0.04 |
| Input Type | TTL |
| Operating Temperature Range(C) | -40 to 85 |
| Output Drive (IOL/IOH)(Max)(mA) | 24/-24 |
| Output Type | CMOS |
| Package Group | SSOP |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ACT |
| VCC(Max)(V) | 5.5 |
| VCC(Min)(V) | 4.5 |
| Voltage(Nom)(V) | 5 |
| tpd @ Nom Voltage(Max)(ns) | 9.4 |
Plan ecológico
| RoHS | Desobediente |
| Pb gratis | No |
Notas de aplicación
- Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Kb, Revisión: A, Archivo publicado: jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - Introduction to LogicPDF, 93 Kb, Archivo publicado: abr 30, 2015
- CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Kb, Archivo publicado: agosto 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con - Implications of Slow or Floating CMOS Inputs (Rev. D)PDF, 260 Kb, Revisión: D, Archivo publicado: jun 23, 2016
- Designing With Logic (Rev. C)PDF, 186 Kb, Revisión: C, Archivo publicado: jun 1, 1997
Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, Archivo publicado: abr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Linea modelo
Serie: 74ACT11074 (6)
- 74ACT11074D 74ACT11074DBLE 74ACT11074DBR 74ACT11074DG4 74ACT11074N 74ACT11074NSR
Clasificación del fabricante
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop