Datasheet Texas Instruments SNJ54LVTH16952WD — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN54LVTH16952 |
| Numero de parte | SNJ54LVTH16952WD |
TRANSCEPTORES REGISTRADOS DE 3.3-V ABT DE 16 BITS CON SALIDAS DE 3 ESTADOS 56-CFP -55 a 125
Hojas de datos
3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs datasheet
PDF, 849 Kb, Revisión: G, Archivo publicado: abr 10, 2000
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 56 | 56 | 56 | 56 |
| Package Type | WD | WD | WD | WD |
| Industry STD Term | CFP | CFP | CFP | CFP |
| JEDEC Code | R-GDFP-F | R-GDFP-F | R-GDFP-F | R-GDFP-F |
| Package QTY | 1 | 1 | 1 | 1 |
| Carrier | TUBE | TUBE | TUBE | TUBE |
| Device Marking | SNJ54LVTH16952 | 5962-9684901QX | A | WD |
| Width (mm) | 9.66 | 9.66 | 9.66 | 9.66 |
| Length (mm) | 18.42 | 18.42 | 18.42 | 18.42 |
| Thickness (mm) | 2.48 | 2.48 | 2.48 | 2.48 |
| Pitch (mm) | .635 | .635 | .635 | .635 |
| Max Height (mm) | 3.05 | 3.05 | 3.05 | 3.05 |
| Mechanical Data | Descargar | Descargar | Descargar | Descargar |
Paramétricos
| Bits | 16 |
| Operating Temperature Range | -55 to 125 C |
| Package Group | CFP |
| Package Size: mm2:W x L | See datasheet (CFP) PKG |
| Rating | Military |
| Schmitt Trigger | No |
| Technology Family | LVT |
| VCC(Max) | 3.6 V |
| VCC(Min) | 2.7 V |
Plan ecológico
| RoHS | See ti.com |
Notas de aplicación
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Linea modelo
Serie: SN54LVTH16952 (2)
- 5962-9684901QXA SNJ54LVTH16952WD
Clasificación del fabricante
- Semiconductors > Space & High Reliability > Logic Products > Buffers/Drivers/Transceivers > Transceivers