Datasheet Texas Instruments ADS8528SRGCR — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | ADS8528 |
| Numero de parte | ADS8528SRGCR |
ADC de 12 bits, 8 canales, muestreo simultáneo, entrada bipolar 64-VQFN -40 a 125
Hojas de datos
ADS85x8 12-, 14-, and 16-Bit, 8-Channel, Simultaneous Sampling ADCs datasheet
PDF, 1.5 Mb, Revisión: C, Archivo publicado: feb 3, 2016
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 64 |
| Package Type | RGC |
| Industry STD Term | VQFN |
| JEDEC Code | S-PQFP-N |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | ADS8528 |
| Width (mm) | 9 |
| Length (mm) | 9 |
| Thickness (mm) | .88 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1 |
| Mechanical Data | Descargar |
Paramétricos
| # Input Channels | 8 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 4.5 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 0.75 +/-LSB |
| Input Range(Max) | 12 V |
| Input Range(Min) | -12 V |
| Input Type | Single-Ended |
| Integrated Features | Daisy-Chainable,Oscillator |
| Interface | Parallel,SPI |
| Multi-Channel Configuration | Simultaneous Sampling |
| Operating Temperature Range | -40 to 125 C |
| Package Group | VQFN |
| Package Size: mm2:W x L | 64VQFN: 81 mm2: 9 x 9(VQFN) PKG |
| Power Consumption(Typ) | 335 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 12 Bits |
| SINAD | 73.8 dB |
| SNR | 73.9 dB |
| Sample Rate (max) | 650kSPS SPS |
| Sample Rate(Max) | 0.65 MSPS |
| THD(Typ) | -89 dB |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- ADS856x Design Challenges and Improvement Techniques for SAR Driver Circuit (Rev. A)PDF, 11.5 Mb, Revisión: A, Archivo publicado: mayo 18, 2015
- ADS8528, ADS8548, and ADS8568 Timing ConsiderationsPDF, 108 Kb, Archivo publicado: jun 21, 2014
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Archivo publicado: marzo 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Linea modelo
Serie: ADS8528 (4)
- ADS8528SPM ADS8528SPMR ADS8528SRGCR ADS8528SRGCT
Clasificación del fabricante
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)